ATMEGA325_14 Datasheet, PDF (274/362 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

ATmega325/3250/645/6450
27.6.5
Figure 27-3. Programming the Flash Waveforms⁽¹⁾
F
DATA
XA1
XA0
BS1
XTAL1
WR
RDY/BSY
RESET +12V
OE
PAGEL
BS2
A
0x10
B
C
D
E
ADDR. LOW DATA LOW DATA HIGH
XX
B
C
D
E
ADDR. LOW DATA LOW DATA HIGH
XX
G
ADDR. HIGH
H
XX
Note: 1. “XX” is don’t care. The letters refer to the programming description above.
Programming the EEPROM
The EEPROM is organized in pages, see Table 27-11 on page 270. When programming the
EEPROM, the program data is latched into a page buffer. This allows one page of data to be
programmed simultaneously. The programming algorithm for the EEPROM data memory is as
follows (refer to “Programming the Flash” on page 272 for details on Command, Address and
Data loading):
1. A: Load Command “0001 0001”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. C: Load Data (0x00 - 0xFF).
5. E: Latch data (give PAGEL a positive pulse).
K: Repeat 3 through 5 until the entire buffer is filled.
L: Program EEPROM page
1. Set BS1 to “0”.
2. Give WR a negative pulse. This starts programming of the EEPROM page. RDY/BSY
goes low.
3. Wait until to RDY/BSY goes high before programming the next page (See Figure 27-4 for
signal waveforms).
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