AT91SAM_13 Datasheet, PDF (270/775 Pages) ATMEL Corporation – ARM-based Flash MCU

28.3 Application Block Diagram
Figure 28-2. Application Block Diagram: Single Master/Multiple Slave Implementation
SPI Master
SPCK
MISO
MOSI
NPCS0
NPCS1
NPCS2 NC
NPCS3
SPCK
MISO
MOSI
NSS
SPCK
MISO
MOSI
NSS
SPCK
MISO
MOSI
NSS
Slave 0
Slave 1
Slave 2
28.4 Signal Description
Table 28-1. Signal Description
Pin Name
MISO
MOSI
SPCK
NPCS1-NPCS3
NPCS0/NSS
Pin Description
Master In Slave Out
Master Out Slave In
Serial Clock
Peripheral Chip Selects
Peripheral Chip Select/Slave Select
Master
Input
Output
Output
Output
Output
Type
Slave
Output
Input
Input
Unused
Input
28.5 Product Dependencies
28.5.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines. The programmer
must first program the PIO controllers to assign the SPI pins to their peripheral functions.
28.5.2 Power Management
The SPI may be clocked through the Power Management Controller (PMC), thus the programmer must first config-
ure the PMC to enable the SPI clock.
28.5.3 Interrupt
The SPI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). Handling the SPI
interrupt requires programming the AIC before configuring the SPI.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
270