AT89C51ID2_0309 Datasheet, PDF (27/159 Pages) ATMEL Corporation – 8-bit Flash Microcontroller

4289A–8051–09/03
AT89C51ID2
Table 22. AUXR1 register
AUXR1- Auxiliary Register 1(0A2h)
7
6
5
4
-
-
ENBOOT
-
3
2
GF3
0
1
0
-
DPS
Bit
Number
7
Bit
Mnemonic Description
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
5
ENBOOT Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
GF3 This bit is a general purpose user flag. *
2
0
Always cleared.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
0
DPS Cleared to select DPTR0.
Set to select DPTR1.
Reset Value: XXXX XX0X0b
Not bit addressable
Note: *Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
ASSEMBLY LANGUAGE
; Block move using dual data pointers
; Modifies DPTR0, DPTR1, A and PSW
; note: DPS exits opposite of entry state
; unless an extra INC AUXR1 is added
;
00A2 AUXR1 EQU 0A2H
;
0000 909000MOV DPTR,#SOURCE ; address of SOURCE
0003 05A2 INC AUXR1 ; switch data pointers
0005 90A000 MOV DPTR,#DEST ; address of DEST
0008 LOOP:
0008 05A2 INC AUXR1 ; switch data pointers
000A E0 MOVX A,@DPTR ; get a byte from SOURCE
000B A3 INC DPTR ; increment SOURCE address
000C 05A2 INC AUXR1 ; switch data pointers
000E F0 MOVX @DPTR,A ; write the byte to DEST
000F A3 INC DPTR ; increment DEST address
0010 70F6JNZ LOOP ; check for 0 terminator
0012 05A2 INC AUXR1 ; (optional) restore DPS
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