AT32AP7002_14 Datasheet, PDF (25/52 Pages) ATMEL Corporation – High Performance, Low Power AVR32 32-Bit Microcontroller

AT32AP7002
7.7 Peripheral Multiplexing on IO lines
7.7.1
The AT32AP7002 features five PIO controllers, PIOA to PIOE, that multiplex the I/O lines of the
peripheral set. Each PIO Controller controls up to thirty-two lines.
Each line can be assigned to one of two peripheral functions, A or B. The tables in the following
pages define how the I/O lines of the peripherals A and B are multiplexed on the PIO
Controllers.
Note that some output only peripheral functions might be duplicated within the tables.
PIO Controller A Multiplexing
Table 7-9. PIO Controller A Multiplexing
CTBGA196
I/O Line
Peripheral A
J3
PA00
SPI0 - MISO
J1
PA01
SPI0 - MOSI
G6
PA02
SPI0 - SCK
J2
PA03
SPI0 - NPCS[0]
G5
PA04
SPI0 - NPCS[1]
K1
PA05
SPI0 - NPCS[2]
C9
PA06
TWI - SDA
E9
PA07
TWI - SCL
G7
PA08
PSIF - CLOCK
J6
PA09
PSIF - DATA
H6
PA10
MCI - CLK
K2
PA11
MCI - CMD
K3
PA12
MCI - DATA[0]
M1
PA13
MCI - DATA[1]
H7
PA14
MCI - DATA[2]
N1
PA15
MCI - DATA[3]
K4
PA16
USART1 - CLK
P1
PA17
USART1 - RXD
J7
PA18
USART1 - TXD
L3
PA19
USART1 - RTS
N2
PA20
USART1 - CTS
L2
PA21
SSC0 - RX_FRAME_SYNC
M2
PA22
SSC0 - RX_CLOCK
M3
PA23
SSC0 - TX_CLOCK
P2
PA24
SSC0 - TX_FRAME_SYNC
L7
PA25
SSC0 - TX_DATA
K7
PA26
SSC0 - RX_DATA
P9
PA27
SPI1 - NPCS[3]
H9
PA28
PWM - PWM[0]
Peripheral B
SSC1 - RX_FRAME_SYNC
SSC1 - TX_FRAME_SYNC
SSC1 - TX_CLOCK
SSC1 - RX_CLOCK
SSC1 - TX_DATA
SSC1 - RX_DATA
USART0 - RTS
USART0 - CTS
USART0 - RXD
USART0 - TXD
USART0 - CLK
TC0 - CLK0
TC0 - A0
TC0 - A1
TC0 - A2
TC0 - B0
TC0 - B1
TC0 - B2
TC0 - CLK2
TC0 - CLK1
SPI0 - NPCS[3]
PWM - PWM[2]
PWM - PWM[3]
TC1 - A0
TC1 - A1
TC1 - B0
TC1 - B1
TC1 - CLK0
TC1 - A2
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32054FS–AVR32–09/09