AT32AP7002_07 Datasheet, PDF (25/45 Pages) ATMEL Corporation – 32-bit Microcontroller

AT32AP7002
7.7 Peripheral Multiplexing on IO lines
7.7.1
The AT32AP7002 features five PIO controllers, PIOA to PIOE, that multiplex the I/O lines of the
peripheral set. Each PIO Controller controls up to thirty-two lines.
Each line can be assigned to one of two peripheral functions, A or B. The tables in the following
pages define how the I/O lines of the peripherals A and B are multiplexed on the PIO
Controllers.
Note that some output only peripheral functions might be duplicated within the tables.
PIO Controller A Multiplexing
Table 7-9.
I/O Line
PA00
PA01
PA02
PA03
PA04
PA05
PA06
PA07
PA08
PA09
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PIO Controller A Multiplexing
Peripheral A
SPI0 - MISO
SPI0 - MOSI
SPI0 - SCK
SPI0 - NPCS[0]
SPI0 - NPCS[1]
SPI0 - NPCS[2]
TWI - SDA
TWI - SCL
PSIF - CLOCK
PSIF - DATA
MCI - CLK
MCI - CMD
MCI - DATA[0]
MCI - DATA[1]
MCI - DATA[2]
MCI - DATA[3]
USART1 - CLK
USART1 - RXD
USART1 - TXD
USART1 - RTS
USART1 - CTS
SSC0 - RX_FRAME_SYNC
SSC0 - RX_CLOCK
SSC0 - TX_CLOCK
SSC0 - TX_FRAME_SYNC
SSC0 - TX_DATA
SSC0 - RX_DATA
SPI1 - NPCS[3]
PWM - PWM[0]
Peripheral B
SSC1 - RX_FRAME_SYNC
SSC1 - TX_FRAME_SYNC
SSC1 - TX_CLOCK
SSC1 - RX_CLOCK
SSC1 - TX_DATA
SSC1 - RX_DATA
USART0 - RTS
USART0 - CTS
USART0 - RXD
USART0 - TXD
USART0 - CLK
TC0 - CLK0
TC0 - A0
TC0 - A1
TC0 - A2
TC0 - B0
TC0 - B1
TC0 - B2
TC0 - CLK2
TC0 - CLK1
SPI0 - NPCS[3]
PWM - PWM[2]
PWM - PWM[3]
TC1 - A0
TC1 - A1
TC1 - B0
TC1 - B1
TC1 - CLK0
TC1 - A2
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32054AS–AVR32–02/07