ATMEGA48 Datasheet, PDF (248/377 Pages) ATMEL Corporation – 8-bit Microcontroller with 8K Bytes In-System Programmable Flash

ATmega48/88/168
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. For a summary of conversion times, see Table 24-1 on page
249.
Figure 24-4. ADC timing diagram, first conversion (single conversion mode).
First conversion
Next
conversion
Cycle number
ADC clock
ADEN
ADSC
ADIF
ADCH
ADCL
1
2
12 13 14 15 16 17 18 19 20 21 22 23 24 25
1
2
3
MUX and REFS
update
Sample & hold
Conversion
complete
Sign and MSB of result
LSB of result
MUX and REFS
update
Figure 24-5. ADC timing diagram, single conversion.
One conversion
Next conversion
Cycle number
ADC clock
ADSC
ADIF
ADCH
ADCL
1
2
3
4
5
6
7
8
9
10 11 12 13
1
2
3
Sample & hold
MUX and REFS
update
Conversion
complete
Sign and MSB of result
LSB of result
MUX and REFS
update
Figure 24-6. ADC timing diagram, auto triggered conversion.
One conversion
Next conversion
Cycle number
ADC clock
Trigger
source
ADATE
ADIF
ADCH
ADCL
Prescaler
reset
1
2
3
4
5
6
7
8
9
10 11 12 13
12
MUX and REFS
update
Sample &
hold
Conversion
complete
Sign and MSB of result
LSB of result
Prescaler
reset
2545T–AVR–05/11
248