ATMEGA649V_14 Datasheet, PDF (240/392 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

• Bit 7 – LCDCS: LCD Clock Select
When this bit is written to zero, the system clock is used. When this bit is written to one, the
external asynchronous clock source is used. The asynchronous clock source is either
Timer/Counter Oscillator or external clock, depending on EXCLK in ASSR. See “Asynchronous
Operation of Timer/Counter2” on page 151 for further details.
• Bit 6 – LCD2B: LCD 1/2 Bias Select
When this bit is written to zero, 1/3 bias is used. When this bit is written to one, ½ bias is used.
Refer to the LCD Manufacture for recommended bias selection.
• Bit 5:4 – LCDMUX1:0: LCD Mux Select
The LCDMUX1:0 bits determine the duty cycle. Common pins that are not used are ordinary port
pins. The different duty selections are shown in Table 23-2.
Table 23-2.
LCDMUX1
0
0
1
1
LCD Duty Select
LCDMUX0
Duty
0
Static
1
1/2
0
1/3
1
1/4
Bias
Static
1/2 or 1/3⁽¹⁾
1/2 or 1/3⁽¹⁾
1/2 or 1/3⁽¹⁾
COM Pin
COM0
COM0:1
COM0:2
COM0:3
I/O Port Pin
COM1:3
COM2:3
COM3
None
Note: 1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.
• Bits 3:0 – LCDPM3:0: LCD Port Mask
The LCDPM3:0 bits determine the number of port pins to be used as segment drivers. The dif-
ferent selections are shown in Table 23-3. Unused pins can be used as ordinary port pins.
Table 23-3. LCD Port Mask (Values in bold are only available in ATmega3290/6490)
LCDPM3 LCDPM2 LCDPM1 LCDPM0
I/O Port in Use as
Segment Driver
Maximum Number
of Segments
0
0
0
0
SEG0:12
13
0
0
0
1
SEG0:14
15
0
0
1
0
SEG0:16
17
0
0
1
1
SEG0:18
19
0
1
0
0
SEG0:20
21
0
1
0
1
SEG0:22
23
0
1
1
0
SEG0:23
24
0
1
1
1
SEG0:24
25
1
0
0
0
SEG0:26
27
1
0
0
1
SEG0:28
29
1
0
1
0
SEG0:30
31
1
0
1
1
SEG0:32
33
1
1
0
0
SEG0:34
35
240 ATmega329/3290/649/6490
2552K–AVR–04/11