AT91SAM9XE128_10 Datasheet, PDF (24/48 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

Figure 8-3. Flash First Memory Plane Mapping
0x0020 0000
Locked Region 0
Page 0
256, 512 or
1024 Pages
Locked Regions Area
128, 256 or 512 Kbytes
Page 31
512 bytes
8.1.5.3
8.1.5.4
0x0021 FFFF
or 0x0023 FFFF
or 0x0027 FFFF
32 bits wide
Locked Region 7, 15 or 31 ^{16 Kbytes}
GPNVM Bits
The AT91SAM9XE128/256/512 features four GPNVM bits that can be cleared or set respec-
tively through the commands “Clear GPNVM Bit” and “Set GPNVM Bit” of the EEFC User
Interface.
Table 8-2. General-purpose Non volatile Memory Bits
GPNVMBit[#]
Function
0
Security Bit
1
Brownout Detector Enable
2
Brownout Detector Reset Enable
3
Boot Mode Select (BMS)
Security Bit
The AT91SAM9XE128/256/512 features a security bit, based on a specific GPNVM bit, GPN-
VMBit[0]. When the security is enabled, access to the Flash, either through the ICE interface or
through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full
Flash erase is performed. When the security bit is deactivated, all accesses to the Flash are
permitted.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal
operation.
24 AT91SAM9XE128/256/512 Preliminary
6254CS–ATARM–08-Jan-10