AT80C51RD2_08 Datasheet, PDF (24/86 Pages) ATMEL Corporation – 80C51 High Performance ROM 8-bit Microcontroller

Bit
Bit
Number Mnemonic Description
Counter Idle Control
7
CIDL Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
6
WDTE Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
CPS1
1
CPS0
0
ECF
Reset Value = 00XX X000b
Not bit addressable
PCA Count Pulse Select
CPS1CPS0 Selected PCA input
0
0
Internal clock f_{CLK PERIPH/6}
0
1
Internal clock f_{CLK PERIPH/2}
1 0 Timer 0 Overflow
1
1
External clock at ECI/P1.2 pin (max rate = f_{CLK PERIPH/4})
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
The CMOD register includes three additional bits associated with the PCA (see Figure 10-4 and
Table 10-1).
• The CIDL bit which allows the PCA to stop during idle mode.
• The WDTE bit which enables or disables the watchdog function on module 4.
• The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in the CCON
SFR) to be set when the PCA timer overflows.
The CCON register contains the run control bit for the PCA and the flags for the PCA timer (CF)
and each module (see Table 10-2).
• Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by clearing this
bit.
• Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an interrupt will be
generated if the ECF bit in the CMOD register is set. The CF bit can only be cleared by
software.
• Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and
are set by hardware when either a match or a capture occurs. These flags can only be
cleared by software.
Table 10-2. CCON Register
24 AT8xc51Rx2
4113C–8051–01/08