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th7899m Datasheet, PDF (23/24 Pages) ATMEL Corporation – FullFieldCCDImageSensor 2048x20Pixels48
Pin-out/Pin Designation
TH7899M
Pin n°
R6, R5, P4, P5, P6, P7
A10, A11, B12, B11, B10, B9
R4, R7, A9, A12
M1, M15, D1, D15
L1, L15, E1, E15
N1, N15, C1, C15
R1, R15, A1, A15
P1, P15, B1, B15
K1, K15, F1, F15
P2, P14, B2, B14
B5, B6, A5, A6
B4, B7, A4, A7
P12, P9, R12, R9,
P11, P10, R11, R10
Symbol
ΦLB1, ΦLB2, ΦLB3, ΦLB4, ΦLB5, ΦLB6
ΦLA1, ΦLA2, ΦLA3, ΦLA4, ΦLA5, ΦLA6
ΦS1, ΦS@, ΦS3, ΦS4
VGL1, VGL2, VGL3, VGL4
VGS1, VGS2, VGS3, VGS4
VOS1, VOS2, VOS3, VOS4
VDD1, VDD2, VDD3, VDD4
VS1, VS2, VS3, VS4
ΦR1, ΦR2, ΦR3, ΦR4
VDR1, VDR2, VDR3, VDR4
ΦPA1, ΦPA2, ΦPA3, ΦPA4
ΦPB1, ΦPB2, ΦPB3, ΦPB4
ΦPC1, ΦPC2, ΦPC3, ΦPC4
ΦPD1, ΦPD2, ΦPD3, ΦPD4
H15, H1
ΦTA, ΦTB
A2, R14
A3, A8, A13, A14, B3, B8,
B13, G1, G15, J1, J15, P3,
P8, P13, R2, R3, R8, R13
VDEA, VDEB
VSS
Designation
B readout register clocks
A readout register clocks
Summing clocks of the output 1, 2, 3 and 4
Readout gate bias of the output 1, 2, 3 and 4
Output gate bias of the output 1, 2, 3 and 4
Output signal video 1, 2, 3 and 4
Output amplifier drain supply of the output 1, 2, 3 and 4
Output amplifier source bias of the output 1, 2, 3 and 4
Reset clocks of the output 1, 2, 3 and 4
Reset bias of the output 1, 2, 3 and 4
A image zone clocks
B image zone clocks
C image zone clocks
D image zone clocks
Transfer gate from the image zone to the readout
registers A and B respectively
Shield drain
Substrate bias
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2201A–IMAGE–02/02