|
AT91CAP9S500A_09 Datasheet, PDF (23/60 Pages) ATMEL Corporation – Customizable Microcontroller Processor | |||
|
◁ |
AT91CAP9S500/AT91CAP9S250A
7.6 Peripheral DMA Controller
⢠Acting as one Matrix Master
⢠Allows data transfers from/to peripheral to/from any memory space without any intervention
of the processor.
⢠Next Pointer Support, forbids strong real-time constraints on buffer management.
⢠Twenty-two Channels
â Two for each USART
â Two for the Debug Unit
â One for the TWI
â One for the ADC Controller
â Two for the AC97 Controller
â Two for each Serial Synchronous Controller
â Two for each Serial Peripheral Interface
â One for the each Multimedia Card Interface
The Peripheral DMA Controller handles transfer requests from the channel according to the fol-
lowing priorities (Low to High priorities):
â DBGU Transmit Channel
â USART2 Transmit Channel
â USART1 Transmit Channel
â USART0 Transmit Channel
â AC97 Transmit Channel
â SPI1 Transmit Channel
â SPI0 Transmit Channel
â SSC1 Transmit Channel
â SSC0 Transmit Channel
â DBGU Receive Channel
â TWI Transmit/Receive Channel
â ADC Receive Channel
â USART2 Receive Channel
â USART1 Receive Channel
â USART0 Receive Channel
â AC97 Receive Channel
â SPI1 Receive Channel
â SPI0 Receive Channel
â SSC1 Receive Channel
â SSC0 Receive Channel
â MCI1 Transmit/Receive Channel
â MCI0 Transmit/Receive Channel
23
6264CSâCAPâ24-Mar-09
|
▷ |