ATMEGA48V_06 Datasheet, PDF (225/374 Pages) ATMEL Corporation – 8-bit Microcontroller with 8K Bytes In-System Programmable Flash

ATmega48/88/168
Figure 20-12. Formats and States in the Master Transmitter Mode
MT
Successfull
transmission
S
to a slave
receiver
$08
Next transfer
started with a
repeated start
condition
SLA
W
A
$18
DATA
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
A
P
$20
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
A or A
Other master
continues
$38
A
Other master
continues
$68 $78 $B0
A
P
$28
R_S
SLA
W
$10
R
MR
A
P
$30
A or A
Other master
continues
$38
To corresponding
states in slave mode
20.7.2
From master to slave
From slave to master
DATA
n
Any number of data bytes
A
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Master Receiver Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see Figure 20-13). In order to enter a Master mode, a START condition must be transmit-
ted. The format of the following address packet determines whether Master Transmitter or
Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R
is transmitted, MR mode is entered. All the status codes mentioned in this section assume that
the prescaler bits are zero or are masked to zero.
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