AT91M55800A_0212 Datasheet, PDF (208/227 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

DAC Mode Register
Register Name: DAC_MR
Access Type:
Read/Write
Reset State:
0
Offset:
0x04
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
–
–
–
–
–
15
14
13
12
11
–
–
–
–
–
7
6
5
4
3
–
–
–
RES
• TTRGEN: Timer Trigger Enable (Code Label DAC_TTRGEN_EN)
26
–
18
–
10
–
2
TTRGSEL
TTRGEN
0
1
Selected TTRGEN
The data written into the Data Holding Register (DAC_DHR) is transferred
one main clock cycle later to the data output register (DAC_DOR).
The data transfer from the DAC_DHR to the DAC_DOR is synchronized
by the timer trigger.
• TTRGSEL: Timer Trigger Selection
Only used if TTRGEN = 1
TTRGSEL
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
X
• RES: Resolution
RES
0
1
Selected Timer Trigger
TIOA0
TIOA1
TIOA2
TIOA3
TIOA4
TIOA5
Reserved
Selected RES
10-bit resolution
8-bit resolution
25
24
–
–
17
16
–
–
9
8
–
–
1
0
TTRGEN
Code Label
DAC_TTRGEN_DIS
DAC_TTRGEN_EN
Code Label
DAC_TTRGSEL
DAC_TRG_TIOA0
DAC_TRG_TIOA1
DAC_TRG_TIOA2
DAC_TRG_TIOA3
DAC_TRG_TIOA4
DAC_TRG_TIOA5
–
Code Label
DAC_10_BIT_RES
DAC_8_BIT_RES
208 AT91M55800A
1745C–ATARM–12/02