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ATMEGA8A_1 Datasheet, PDF (201/307 Pages) ATMEL Corporation – 8-bit with 8K Bytes In-System Programmable Flash
ATmega8A
The ADC module contains a prescaler, which generates an acceptable ADC clock frequency
from any CPU frequency above 100 kHz. The prescaling is set by the ADPS bits in ADCSRA.
The prescaler starts counting from the moment the ADC is switched on by setting the ADEN bit
in ADCSRA. The prescaler keeps running for as long as the ADEN bit is set, and is continuously
reset when ADEN is low.
When initiating a single ended conversion by setting the ADSC bit in ADCSRA, the conversion
starts at the following rising edge of the ADC clock cycle. A normal conversion takes 13 ADC
clock cycles. The first conversion after the ADC is switched on (ADEN in ADCSRA is set) takes
25 ADC clock cycles in order to initialize the analog circuitry.
The actual sample-and-hold takes place 1.5 ADC clock cycles after the start of a normal conver-
sion and 13.5 ADC clock cycles after the start of an first conversion. When a conversion is
complete, the result is written to the ADC Data Registers, and ADIF is set. In single conversion
mode, ADSC is cleared simultaneously. The software may then set ADSC again, and a new
conversion will be initiated on the first rising ADC clock edge.
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. For a summary of conversion times, see Table 22-1.
Figure 22-3. ADC Timing Diagram, First Conversion (Single Conversion Mode)
First Conversion
Next
Conversion
Cycle Number
ADC Clock
ADEN
ADSC
ADIF
ADCH
ADCL
1
2
12 13 14 15 16 17 18 19 20 21 22 23 24 25
1
2
3
MUX and REFS
Update
Sample & Hold
Conversion
Complete
MSB of Result
LSB of Result
MUX and REFS
Update
Figure 22-4. ADC Timing Diagram, Single Conversion
One Conversion
Next Conversion
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
1
2
3
4
5
6
7
8
9
10 11 12 13
1
2
3
Sample & Hold
MUX and REFS
Update
Conversion
Complete
MSB of Result
LSB of Result
MUX and REFS
Update
8159C–AVR–07/09
201