AT49BV162A Datasheet, PDF (2/29 Pages) ATMEL Corporation – 16-megabit (1M x 16/2M x 8) 3-volt Only Flash Memory

AT49BV162A(T)
TSOP Top View
Type 1
A15 1
A14 2
A13 3
A12 4
A11 5
A10 6
A9 7
A8 8
A19 9
NC 10
WE 11
RESET 12
NC 13
VPP 14
RDY/BUSY 15
A18 16
A17 17
A7 18
A6 19
A5 20
A4 21
A3 22
A2 23
A1 24
48 A16
47 BYTE
46 GND
45 I/O15/A-1
44 I/O7
43 I/O14
42 I/O6
41 I/O13
40 I/O5
39 I/O12
38 I/O4
37 VCC
36 I/O11
35 I/O3
34 I/O10
33 I/O2
32 I/O9
31 I/O1
30 I/O8
29 I/O0
28 OE
27 GND
26 CE
25 A0
AT49BV163A(T)
TSOP Top View
Type 1
A15 1
A14 2
A13 3
A12 4
A11 5
A10 6
A9 7
A8 8
A19 9
NC 10
WE 11
RESET 12
NC 13
NC 14
RDY/BUSY 15
A18 16
A17 17
A7 18
A6 19
A5 20
A4 21
A3 22
A2 23
A1 24
48 A16
47 BYTE
46 GND
45 I/O15/A-1
44 I/O7
43 I/O14
42 I/O6
41 I/O13
40 I/O5
39 I/O12
38 I/O4
37 VCC
36 I/O11
35 I/O3
34 I/O10
33 I/O2
32 I/O9
31 I/O1
30 I/O8
29 I/O0
28 OE
27 GND
26 CE
25 A0
AT49BV162A(T)
CBGA Top View
(Ball Down)
123456
A
A3 A7 RDY/BUSY WE A9 A13
B
A4 A17 VPP RST A8 A12
C
A2 A6 A18 NC A10 A14
D
A1 A5 NC A19 A11 A15
E
A0 I/O0 I/O2 I/O5 I/O7 A16
F
CE I/O8 I/O10 I/O12 I/O14 BYTE
G
OE I/O9 I/O11 VCC I/O13 I/015/A-1
H
VSS I/O1 I/O3 I/O4 I/O6 VSS
The device powers on in the read mode. Command sequences are used to place the device
in other operation modes such as program and erase. The device has the capability to protect
the data in any sector (see “Sector Lockdown” section).
To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend
feature. This feature will put the erase or program on hold for any amount of time and let the
user read data from or program data to any of the remaining sectors within the memory. The
end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by
the toggle bit.
The VPP pin provides data protection. When the V_PP input is below 0.4V, the program and
erase functions are inhibited. When V_PP is at 0.9V or above, normal program and erase oper-
ations can be performed.
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the require-
ment of entering the three-byte program sequence is offered to further improve programming
time. After entering the six-byte code, only single pulses on the write control lines are required
for writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering
down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing
it back to V_CC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands
will not work while in this mode; if entered they will result in data being programmed into the
device. It is not recommended that the six-byte code reside in the software of the final product
but only exist in external programming code.
The BYTE pin controls whether the device data I/O pins operate in the byte or word configura-
tion. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are
active and controlled by CE and OE.
If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-
stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.
2 AT49BV162/163A(T)
3349G–FLASH–7/04