ATMEGA644P-B_14 Datasheet, PDF (190/344 Pages) ATMEL Corporation – 8-bit Atmel Microcontroller with 16/32/64Kbytes In-system Programmable Flash

21.7.2 Master Receiver Mode
In the master receiver mode, a number of data bytes are received from a slave transmitter (slave see Figure 21-13). In order
to enter a master mode, a START condition must be transmitted. The format of the following address packet determines
whether master transmitter or master receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R
is transmitted, MR mode is entered. All the status codes mentioned in this section assume that the prescaler bits are zero or
are masked to zero.
Figure 21-13. Data Transfer in Master Receiver Mode
V_CC
Device 1 Device 2
Master
Slave
Device 3 ........ Device n R1
R2
Receiver
Transmitter
SDA
SCL
A START condition is sent by writing the following value to TWCR:
TWCR
TWINT
TWEA
TWSTA TWSTO TWWC
TWEN
–
TWIE
value
1
X
1
0
X
1
0
X
TWEN must be written to one to enable the 2-wire serial interface, TWSTA must be written to one to transmit a START
condition and TWINT must be set to clear the TWINT flag. The TWI will then test the 2-wire serial bus and generate a
START condition as soon as the bus becomes free. After a START condition has been transmitted, the TWINT flag is set by
hardware, and the status code in TWSR will be 0x08 (See Table 21-3 on page 188). In order to enter MR mode, SLA+R must
be transmitted. This is done by writing SLA+R to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to
continue the transfer. This is accomplished by writing the following value to TWCR:
TWCR
TWINT
TWEA
TWSTA TWSTO TWWC
TWEN
–
value
1
X
0
0
X
1
0
TWIE
X
When SLA+R have been transmitted and an acknowledgement bit has been received, TWINT is set again and a number of
status codes in TWSR are possible. Possible status codes in master mode are 0x38, 0x40, or 0x48. The appropriate action
to be taken for each of these status codes is detailed in Table 21-4 on page 191. Received data can be read from the TWDR
register when the TWINT flag is set high by hardware. This scheme is repeated until the last byte has been received. After
the last byte has been received, the MR should inform the ST by sending a NACK after the last received data byte. The
transfer is ended by generating a STOP condition or a repeated START condition.
A STOP condition is generated by writing the following value to TWCR:
TWCR
TWINT
TWEA
TWSTA TWSTO TWWC
TWEN
–
TWIE
value
1
X
0
1
X
1
0
X
A REPEATED START condition is generated by writing the following value to TWCR:
TWCR
TWINT
TWEA
TWSTA TWSTO TWWC
TWEN
–
TWIE
value
1
X
1
0
X
1
0
X
190 ATmega164P-B/ATmega324P-B/ATmega644P-B [DATASHEET]
9255E–AVR–08/14