AT49LH004 Datasheet, PDF (19/36 Pages) ATMEL Corporation – 4-megabit Firmware Hub and Low-Pin Count Flash Memory

AT49LH004
Table 12. Function of Sector Locking Bits
Bit
Name
Description
7:3
Reserved Reserved for future use.
2
Read-Lock 0 Sector is not read-locked.
Normal read operations in the sector can occur. This is the default state.
1 Sector is read-locked.
Read operations within the sector are prevented. Data read will be 00H.
1
Lock-Down 0 Sector is not locked down.
The Read-Lock and Write-Lock bits may be changed. This is the default state.
1 Sector is locked down.
The Read-Lock and Write-Lock bits cannot be changed. Once the sector is locked down, it will
remain locked down until the device is reset (using the RST or INIT signals) or power-cycled.
0
Write-Lock 0 Sector is not write-locked.
Normal program and erase operations to the sector can occur.
1 Sector is write-locked.
Program and erase operations to the sector are prevented. This is the default state.
Table 13. Valid Sector Locking Register Values
Data
Resulting Sector State
07H
Sector is read and write locked down.
06H
Sector is read locked down.
05H
Sector is read and write locked but not locked down.
04H
Sector is read locked but not locked down.
03H
Sector is write locked down.
02H
Sector is locked open (full access locked down).
01H
Sector is write locked but not locked down. This is the default state.
00H
Sector is open for full access.
General Purpose Input Register
A General-purpose Input Register is provided to read the status of the GPI[4:0] pins when using the FWH/LPC interface.
Since this is a pass-through register, there is no default value. It is recommended that the GPI[4:0] pins be in their desired
state before FWH4/LFRAME is brought low for the beginning of the next bus cycle and remain in that state until the end of
the cycle.
Table 14. GPI Register Memory Address
Register Name
GPI_REG
Associated Pins
GPI[4:0]
Register Memory Address
FWH Mode
LPC Mode
FFBC0100H
FF7C0100H
Register Type
Read Only
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