AT40K05_14 Datasheet, PDF (19/55 Pages) ATMEL Corporation – Ultra High Performance

9.10
Primary I/O
Every logic cell at the edge of the FPGA array has a direct orthogonal connection to and from a Primary I/O cell. The
Primary I/O interfaces directly to its adjacent core cell. It also connects into the repeaters on the row immediately above
and below the adjacent core cell. In addition, each Primary I/O also connects into the busing network of the three nearest
edge cells. This is an extremely powerful feature, as it provides logic cells toward the center of the array with fast access
to I/Os via local and express buses. It can be seen from the diagram that a given Primary I/O can be accessed from any
logic cell on three separate rows or columns of the FPGA. See Figure 9-1 and Figure 9-2.
9.11
Secondary I/O
Every logic cell at the edge of the FPGA array has two direct diagonal connections to a Secondary I/O cell. The
Secondary I/O is located between core cell locations. This I/O connects on the diagonal inputs to the cell above and the
cell below. It also connects to the repeater of the cell above and below. In addition, each Secondary I/O also connects
into the busing network of the two nearest edge cells. This is an extremely powerful feature, as it provides logic cells
toward the center of the array with fast access to I/Os via local and express buses. It can be seen from the diagram that
a given Secondary I/O can be accessed from any logic cell on two rows or columns of the FPGA. See Figure 9-1 and
Figure 9-2.
9.12
Corner I/O
Logic cells at the corner of the FPGA array have direct-connect access to five separate I/Os:
 Two Primary
 Two Secondary
 One Corner I/O
Corner I/Os are like an extra Secondary I/O at each corner of the array. With the inclusion of Corner I/Os, an AT40K
FPGA with n x n core cells always has 8n I/Os. As the diagram shows, Corner I/Os can be accessed both from the corner
logic cell and the horizontal and vertical busing networks running along the edges of the array. This means that many
different edge logic cells can access the Corner I/Os. See Figure 9-3.
Atmel AT40K Series FPGA [DATASHEET] 19
Atmel-0896E-FPGA-AT40K05-10-20-40-Datasheet_062013