English
Language : 

AT73C224-E_14 Datasheet, PDF (18/75 Pages) ATMEL Corporation – Activation of the Power Management Modules via Dedicated Enable Pin
The TWI abbreviations are defined below.
S = Start
P = Stop
W = Write
R = Read
A = Acknowledge
N = Not Acknowledge
ADDR = Device Address
IADDR = Internal Address
Figure 5-10. Write Operation
TWD
S
ADDR
WA
IADDR
A
DATA
A
P
Figure 5-11. Read Operation
TWD
S
ADDR
WA
IADDR
A
S
ADDR
R
A
DATA
N
P
5.3.3
Interrupt Controller
In dynamic mode, the ITB/RDY pin is an output and operates as an interrupt to an external
microcontroller. The output logic is active low (a 0 level means interrupt).
Several sources can potentially trigger an interrupt:
• the RTC, when a real-time alarm event occurs (see Section 7.8 ”Real-time Clock (RTC)” for
more details)
• the push-button, when its state changes
• the power monitor, when it detects a failure or main battery lower than 2.7V
• the boost, when it detects a failure
• the buck, when it detects a failure
Each of these sources can be individually masked to disable the corresponding interrupt. All the
interrupt logic can also be globally disabled when the microcontroller needs to enter an uninter-
ruptible state. The interrupt enable/disable logic is controlled through two independent registers.
Refer to Section 6. ”Register Tables” for detailed register and bit assignment. IRQ_EN is used to
enable the interrupts, while IRQ_DIS is used to disable the interrupts. This strategy allows the
controlling software to handle the interrupt mask completely independently for each interrupt
source while avoiding read-modify-write operations. The register IRQ_MSK can be read to know
the current interrupt mask.
The sequence shown below in Table 5-3 shows an example of interrupt masking/unmasking.
Table 5-3. Interrupt Masking/Unmasking
Action
What it Does
Reset
Disables all interrupts individually and globally.
Write 00000101 in IRQ_EN
Enables the RTC interrupt and the power failure interrupt individually. The
interrupts are still globally masked, no interrupt can be triggered yet.
Write 00000000 in IRQ_EN Nothing happens, only bits set at one have an effect.
Write 10000000 in IRQ_EN
Enables the interrupts globally. The ITB pin will toggle to 0 if either the
RTC or the power monitor requests an interrupt.
Write 00000001 in IRQ_DIS Disables the RTC interrupt. The power failure interrupt remains active.
Contents of IRQ_MSK
00000000
00000101
00000101
10000101
10000100
18 AT73C224
6266A–PMAAC–08-Sep-08