ATWINC1500_14 Datasheet, PDF (17/26 Pages) ATMEL Corporation – Single Chip IEEE 802.11 b/g/n Network Controller SOC

Table 9-1.
WINC1500 I²C Timing Parameters
Parameter
Symbol Min
SCL clock frequency
SCL low pulse width
SCL high pulse width
SCL, SDA fall time
SCL, SDA rise time
START setup time
START hold time
SDA setup Time
SDA hold time
f_SCL
0
t_WL
1.3
t_WH
0.6
t_HL
t_LH
t_SUSTA
0.6
t_HDSTA
0.6
t_SUDAT
100
0
t_HDDAT
40
STOP setup time
t_SUSTO
0.6
Bus free time between STOP and START t_BUF
1.3
Glitch pulse reject
t_PR
0
Max Units Remarks
400 kHz
µs
µs
300
ns
300
ns This is dictated by external components
µs
µs
ns
ns Slave and Master default
ns Master programming option
µs
µs
50
ns
9.2 SPI Interface
9.2.1
Overview
Atmel WINC1500 device has a Serial Peripheral Interface (SPI) that operates as a SPI slave. The SPI interface
can be used for control and for serial I/O of 802.11 data. The SPI pins are mapped as shown in Table 9-2. The
SPI is a full-duplex slave-synchronous serial interface that is available immediately following reset when pin 9
(SDIO_SPI_CFG) is tied to VDDIO.
Table 9-2. WINC1500 SPI Interface Pin Mapping
Pin #
9
16
13
18
17
SPI Function
CFG: Must be tied to VDDIO
SSN: Active Low Slave Select
RXD: Serial Data Receive
SCK: Serial Clock
TXD: Serial Data Transmit
When the SPI is not selected, i.e., when SSN is high, the SPI interface will not interfere with data transfers
between the serial-master and other serial-slave devices. When the serial slave is not selected, its transmitted
data output is buffered, resulting in a high impedance drive onto the serial master receive line.
The SPI interface responds to a protocol that allows an external host to read or write any register in the chip as
well as initiate DMA transfers.
Atmel ATWILC1500A [PRELIMINARY DATASHEET]
17
Atmel-42353A-WINC1500-SmartConnect-Datasheet_092014