AT91M42800A Datasheet, PDF (17/23 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

AT91M42800A
SF: Special Function
User Peripherals
USART: Universal
Synchronous/
Asynchronous
Receiver Transmitter
TC: Timer/Counter
SPI: Serial Peripheral
Interface
The AT91M42800A provides registers that implement the following special functions.
• Chip Identification
• RESET Status
The AT91M42800A provides two identical, full-duplex, universal synchronous/asynchronous
receiver/transmitters that interface to the APB and are connected to the Peripheral Data
Controller.
The main features are:
• Programmable Baud Rate Generator with External or Internal Clock, as well as Slow
Clock
• Parity, Framing and Overrun Error Detection
• Line Break Generation and Detection
• Automatic Echo, Local Loopback and Remote Loopback channel modes
• Multi-drop mode: Address Detection and Generation
• Interrupt Generation
• Two Dedicated Peripheral Data Controller channels
• 5-, 6-, 7-, 8- and 9-bit character length
The AT91M42800A features two Timer/Counter blocks, each containing three identical 16-bit
Timer/Counter channels. Each channel can be independently programmed to perform a wide
range of functions including frequency measurement, event counting, interval measurement,
pulse generation, delay timing and pulse-width modulation.
Each Timer/Counter (TC) channel has 3 external clock inputs, 5 internal clock inputs, and 2
multi-purpose input/output signals that can be configured by the user. Each channel drives an
internal interrupt signal that can be programmed to generate processor interrupts via the AIC
(Advanced Interrupt Controller).
The Timer/Counter block has two global registers that act upon all three TC channels. The
Block Control Register allows the three channels to be started simultaneously with the same
instruction. The Block Mode Register defines the external clock inputs for each Timer/Counter
channel, allowing them to be chained.
Each Timer/Counter block operates independently and has a complete set of block and chan-
nel registers.
The AT91M42800A includes two SPIs that provide communication with external devices in
Master or Slave mode. They are independent, and are referred to by the letters A and B. Each
SPI has four external chip selects that can be connected to up to 15 devices. The data length
is programmable from 8- to 16-bit.
17
1779BS–ATARM–02/02