AT45DB321B_14 Datasheet, PDF (17/32 Pages) ATMEL Corporation – Serial Peripheral Interface (SPI) Compatible

AT45DB321B
Read Operations
The following block diagram and waveforms illustrate the various read sequences
available.
FLASH MEMORY ARRAY
PAGE (528 BYTES)
MAIN MEMORY
PAGE TO
BUFFER 1
BUFFER 1 (528 BYTES)
BUFFER 1
READ
MAIN MEMORY
PAGE TO
BUFFER 2
BUFFER 2 (528 BYTES)
MAIN MEMORY
PAGE READ
BUFFER 2
READ
I/O INTERFACE
SO
Main Memory Page Read
CS
SI
CMD
r , PA12-6 PA5-0, BA9-8
BA7-0
X
X
X
X
SO
n
n+1
Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer)
Starts reading page data into buffer
CS
SI
CMD
r , PA12-6
PA5-0, XX
X
SO
Buffer Read
CS
SI
SO
CMD
X
X···X, BFA9-8 BFA7-0
X
n
n+1
Each transition represents
8 bits and 8 clock cycles
n = 1st byte read
n+1 = 2nd byte read
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2223E–DFLASH–11//03