U3745BM Datasheet, PDF (16/29 Pages) ATMEL Corporation – UHF ASK RECEIVER IC

Figure 13. Synchronization of the Demodulator Output
T _XClk
Clock Bit check
counter
Dem_out
DATA
t _ee
Figure 14. Debouncing of the Demodulator Output
Dem_out
DATA
Lim_min £ CV_Lim < Lim_max
t _ee
tmin1
CV_Lim < Lim_min or CV_Lim ³ Lim_max
t _ee
tmin2
Figure 15. Steady L State Limited DATA Output Pattern after Transmission
Enable IC
Bit check
Dem_out
DATA
Sleep Mode
Bit check Mode
Receiving Mode
tmin2
t _{DATA_L_max}
Switching the Receiver Back
to Sleep Mode
After the end of a data transmission, the receiver remains active and random noise
pulses appear at pin DATA. The edge-to-edge time period t_ee of the majority of these
noise pulses is equal to or slightly higher than T_{DATA_min}.
The receiver can be set back to polling mode via pin DATA or via pin ENABLE.
When using pin DATA, this pin must be pulled to Low for the period t1 by the connected
microcontroller. Figure 16 illustrates the timing of the OFF command (see also Figure
20). The minimum value of t1 depends on the BR_Range. The maximum value for t1 is
not limited but it is recommended not to exceed the specified value to prevent erasing
the reset marker. This item is explained in more detail in the section “Configuration of
the Receiver”. Setting the receiver to sleep mode via DATA is achieved by programming
bit 1 of the OPMODE register to 1. Only one sync pulse (t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the
OFF command, the sleep time T_Sleep elapses. Note that the capacitive load at Pin DATA
is limited. The resulting time constant t together with an optional external pull-up resistor
may not be exceeded to ensure proper operation.
If the receiver is set to polling mode via pin ENABLE, an ‘L’ pulse (T_Doze) must be issued
at that pin. Figure 17 illustrates the timing of that command. After the positive edge of
16 U3745BM
4663A–RKE–06/03