AT90PWM216_14 Datasheet, PDF (151/344 Pages) ATMEL Corporation – Atmel 8-bit Microcontroller with 16K Bytes In-System Programmable Flash

In center aligned mode, OCRnRAH/L is not used, so it can be used to specified the synchronization of the ADC. It
this case, it’s minimum value is 1.
15.21 Interrupt Handling
As each PSC can be dedicated for one function, each PSC has its own interrupt system (vector ...)
List of interrupt sources:
• Counter reload (end of On Time 1)
• PSC Input event (active edge or at the beginning of level configured event)
• PSC Mutual Synchronization Error
15.22 PSC Synchronization
2 or 3 PSC can be synchronized together. In this case, two waveform alignments are possible:
• The waveforms are center aligned in the Center Aligned mode if master and slaves are all with the same PSC
period (which is the natural use).
• The waveforms are edge aligned in the 1, 2 or 4 ramp mode
Figure 15-38. PSC Run Synchronization
PRUN0
SY0In
PARUN0
PRUN1
PARUN1
SY1In
PRUN2
PARUN2
SY2In
Run PSC0
SY0Out ^PSC0
Run PSC1
SY1Out ^PSC1
Run PSC2
SY2Out ^PSC2
If the PSCn has its PARUNn bit set, then it can start at the same time as PSCn-1.
PRUNn and PARUNn bits are located in PCTLn register. See “PSC 0 Control Register – PCTL0” on page 157. See
“PSC 1 Control Register – PCTL1” on page 158. See “PSC 2 Control Register – PCTL2” on page 159.
Note : Do not set the PARUNn bits on the three PSC at the same time.
AT90PWM216/316 [DATASHEET] 151
7710H–AVR–07/2013