AT73C239_07 Datasheet, PDF (14/31 Pages) ATMEL Corporation – Power Management and Analog Companions (PMAAC)

The device acknowledges each received byte. The first byte sent after the device address and
the R/W bit, is the address of the device register the host wants to read or write.
For a write operation the data follows the internal address. For a read operation a repeated
START condition needs to be generated followed by a read on the device.
Figure 9-3. Write Operation
TWD ^S
ADDR
W
A
IADDR
A
DATA
A
P
Figure 9-4. Read Operation
TWD S
ADDR
W
A
IADDR
A
S
• S = Start
• P = Stop
• W = Write
• R = Read
• A = Acknowledge
• N = Not Acknowledge
• DADR= Device Address
• IADR = Internal Address
ADDR
R
A
DATA
N
P
14 AT73C239
6201C–PMAAC–31-Jul-07