80C32E_14 Datasheet, PDF (14/20 Pages) ATMEL Corporation – 8032 Pin and Instruction Compatible

Figure 9. External Data Memory Read Cycle
ALE
T_WHLH
PSEN
WR
PORT 0
PORT 2
ADDRESS
OR SFR-P2
T_LLWL
T_WLWH
T_LLAX
A0-A7
T_AVWL
T_QVWX
T_QVWH
DATA OUT
ADDRESS A8-A15 OR SFR P2
T_WHQX
Table 6. Serial Port Timing – Shift Register Mode (ns)
Symbol
T_XLXL
T_QVHX
T_XHQX
T_XHDX
T_XHDV
Parameter
Serial port clock cycle time
Output data set-up to clock rising edge
Output data hold after clock rising edge
Input data hold after clock rising edge
Clock rising edge to input data valid
30 MHz
Min Max
400
300
50
0
300
Figure 10. Shift Register Timing Waveforms
INSTRUCTION
ALE
CLOCK
OUTPUT DATA
WRITE to SBUF
INPUT DATA
0
1
2
3
T_XLXL
T_QVXH
T_XHQX
0
1
2
T_XHDV
VALID
T_XHDX
VALID
VALID
CLEAR RI
4
3
VALID
5
6
7
8
4
5
6
7
SET TI
VALID
VALID
VALID
VALID
SET RI
14 80C32E
4149N–AERO–04/07