AT83C5122_08 Datasheet, PDF (135/208 Pages) ATMEL Corporation – C51 Microcontroller with USB and Smart Card Reader Interfaces

AT83R5122, AT8xC5122/23
Serial Port Interface
(SPI)
Features
Signal Description
Only for AT8xC5122.
The Serial Peripheral Interface module (SPI) which allows full-duplex, synchronous,
serial communication between the MCU and peripheral devices, including other MCUs.
Features of the SPI module include the following:
• Full-duplex, three-wire synchronous transfers
• Master or Slave operation
• Eight programmable Master clock rates
• Serial clock with programmable polarity and phase
• Master Mode fault error flag with MCU interrupt capability
• Write collision flag protection
Figure 82 shows a typical SPI bus configuration using one Master controller and many
Slave peripherals. The bus is made of three wires connecting all the devices:
Figure 82. Typical SPI Bus
Master
MISO
MOSI
SCK
SS
VDD
0
1
2
3
Slave 1
Master Output Slave Input
(MOSI)
Master Input Slave Output
(MISO)
SPI Serial Clock (SCK)
Slave 4
Slave 3
Slave 2
The Master device selects the individual Slave devices by using four pins of a parallel
port to control the four SS pins of the Slave devices.
This 1-bit signal is directly connected between the Master Device and a Slave Device.
The MOSI line is used to transfer data in series from the Master to the Slave. Therefore,
it is an output signal from the Master, and an input signal to a Slave. A byte (8-bit word)
is transmitted most significant bit (MSB) first, least significant bit (LSB) last.
This 1-bit signal is directly connected between the Slave Device and a Master Device.
The MISO line is used to transfer data in series from the Slave to the Master. Therefore,
it is an output signal from the Slave, and an input signal to the Master. A byte (8-bit
word) is transmitted most significant bit (MSB) first, least significant bit (LSB) last.
This signal is used to synchronize the data movement both in and out the devices
through their MOSI and MISO lines. It is driven by the Master for eight clock cycles
which allows to exchange one byte on the serial lines.
4202F–SCR–07/2008
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