AT89LP51RD2_14 Datasheet, PDF (12/26 Pages) ATMEL Corporation – 8-bit Microcontroller Compatible with 8051 Products

3. Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table 3-1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect. User software should not write to these unlisted
locations, since they may be used in future products to invoke new features.
Table 3-1. Atmel AT89LP51RD2/ED2/ID2 SFR Map and Reset Values
8
9
A
B
C
D
E
F
0F8H
CH
CCAP0H CCAP1H CCAP2H CCAP3H CCAP4H
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
0F0H
B
0000 0000
RL0
RL1
RH0
RH1
PAGE
BX
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
0E8H
CL
CCAP0L CCAP1L CCAP2L CCAP3L CCAP4L
SPX
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 xxxx x000
0E0H
ACC
0000 0000
AX
0000 0000
DSPR
0000 0000
FIRD
0000 0000
MACL
0000 0000
MACH
0000 0000
P0M0
(2)
P0M1
0000 0000
0D8H
CCON
00x0 0000
CMOD
00xx x000
CCAPM0
x000 0000
CCAPM1
x000 0000
CCAPM2
x000 0000
CCAPM3
x000 0000
CCAPM4
x000 0000
0D0H
PSW
0000 0000
FCON
xxxx 0000
EECON
0000 0000
DPLB
DPHB
0000 0000 0000 0000
P1M0
(2)
P1M1
0000 0000
0C8H T2CON
T2MOD
RCAP2L RCAP2H
TL2
TH2
0000 0000 0000 0000 0000 000 0000 0000 0000 000 0000 0000
P2M0
(2)
P2M1
0000 0000
0C0H
P4
1111 1111
SPCON
SPSTA
SPDAT
0001 0100 0000 0000 xxxx xxxx
P3M0
(2)
P3M1
0000 0000
0B8H
IPL0
xx00 0000
SADEN
0000 0000
AREF
0000 0000
P4M0
(2)
P4M1
0000 0000
0B0H
P3
1111 1111
IEN1
xxxx 0000
IPL1
xxxx 0000
IPH1
xxxx 0000
IPH0
xx00 0000
0A8H
IEN0
0x00 0000
SADDR
0000 0000
ACSRB
DADL
DADH
CLKREG CKCON1
0000 0000 0000 0000 0000 0000 0101 xxxx xxxx xxx0
0A0H
P2
DPCF
AUXR1
ACSRA
DADC
DADI
WDTRST WDTPRG
1111 1111 0000 0000 0000 00x0 0000 0000 0000 0000 0000 0000 (write-only) 0000 0xx0
98H
SCON
0000 0000
SBUF
xxxx xxxx
BRL
BDRCON
KBLS
KBE
KBF
KBMOD
0000 0000 xxx0 0000 0000 0000 0000 0000 0000 0000 0000 0000
90H
P1
1111 1111
TCONB
0010 0100
BMSEL
xxxx xxx0
SSCON
0000 0000
SSCS
1111 1000
SSDAT
1111 1111
SSADR
1111 1110
CKRL
1111 1111
88H
TCON
0000 0000
TMOD
0000 0000
TL0
0000 0000
TL1
0000 0000
TH0
0000 0000
TH1
0000 0000
AUXR
0000 0000
CKCON0
0000 0000
80H
P0
1111 1111
SP
0000 0111
DPL
0000 0000
DPH
0000 0000
CKSEL OSCCON
PCON
xxxx xxx0 xxxx x001 000x 0000
0
1
2
3
4
5
6
7
Notes: 1. All SFRs in the left-most column are bit-addressable.
2. Reset value is 1111 1111B when Tristate-Port Fuse is enabled and 0000 0000B when disabled.
3. Reset value is 0101 0010B when Compatibility mode is enabled and 0000 0000B when disabled.
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H
12 AT89LP51RD2/ED2/ID2 Summary - Preliminary
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