 English |
|
|
|
|
|
|
|
| AT52BC3221A Datasheet, PDF (12/36 Pages) ATMEL Corporation – 32-Mbit Flash + 8-Mbit PSRAM Stack Memory | |||
| |||
| ◁ |
Command Definition in Hex(1)
Command
Sequence
Bus
Cycles
1st Bus
Cycle
Addr Data
2nd Bus
Cycle
Addr
Data
3rd Bus
Cycle
Addr Data
4th Bus
Cycle
Addr
Data
5th Bus
Cycle
Addr
Data
6th Bus
Cycle
Addr
Data
Read
Chip Erase
1
Addr
DOUT
6
555
AA
AAA(2)
55
555
80
555
AA
AAA
55
555
10
Sector Erase
6
555
AA
AAA
55
555
80
555
AA
AAA
55
SA(3)(4)
30
Word Program
Enter Single Pulse
Program Mode
4
555
AA
AAA
55
555
A0
Addr
DIN
6
555
AA
AAA
55
555
80
555
AA
AAA
55
555
A0
Single Pulse Word
Program
1
Addr
DIN
Sector Lockdown
6
555
AA
AAA(2)
55
555
80
555
AA
AAA
55
SA(3)(4)
60
Erase/Program
Suspend
1
XXX
B0
Erase/Program
Resume
1
XXX
30
Product ID Entry
3
555
AA
AAA
55
555
90
Product ID Exit(5)
3
555
AA
AAA
55
555
F0(8)
Product ID Exit(5)
1
XXX
F0(8)
Program Protection
Register
4
555
AA
AAA
55
555
C0
Addr
DIN
Lock Protection
Register - Block B
4
555
AA
AAA
55
555
C0
80
X0
Status of Block B
Protection
4
555
AA
AAA
55
555
90
80
DOUT(6)
Set Configuration
Register
4
555
AA
AAA
55
555
D0
XXX
00/01(7)
Notes:
1. The DATA FORMAT shown for each bus cycle is as follows; I/O7 - I/O0 (Hex). In word operation I/O15 - I/O8
are donât care. The ADDRESS FORMAT shown for each bus cycle is as follows: A11 - A0 (Hex). Address A20 through A11
are donât care in the word mode.
2. Since A11 is a Donât Care, AAA can be replaced with 2AA.
3. SA = sector address. Any word address within a sector can be used to designate the sector address (see pages 15-17 for
details).
4. Once a sector is in the lockdown mode, data in the protected sector cannot be changed unless the chip is reset or power
cycled.
5. Either one of the Product ID Exit commands can be used.
6. If data bit D1 is â0â, block B is locked. If data bit D1 is â1â, block B can be reprogrammed.
7. The default state (after power-up) of the configuration register is â00â.
8. Bytes of data other than F0 may be used to exit the Product ID mode. However, it is recommended that F0 be used.
Protection Register Addressing Table
Word
Use
Block
A7
A6
A5
A4
A3
A2
A1
A0
0
Factory
A
1
0
0
0
0
0
0
1
1
Factory
A
1
0
0
0
0
0
1
0
2
Factory
A
1
0
0
0
0
0
1
1
3
Factory
A
1
0
0
0
0
1
0
0
4
User
B
1
0
0
0
0
1
0
1
5
User
B
1
0
0
0
0
1
1
0
6
User
B
1
0
0
0
0
1
1
1
7
User
B
1
0
0
0
1
0
0
0
Note: All address lines not specified in the above table must be â0â when accessing the protection register, i.e., A20 - A8 = 0.
12 AT52BC3221A(T)
3466AâSTKDâ11/04
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese