AT24C02C_14 Datasheet, PDF (11/19 Pages) ATMEL Corporation – 2-wire Automotive Temperature Serial EEPROMs

8. Write Operations
Byte Write: A write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the
addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this
time, the EEPROM enters an internally timed write cycle (t_WR) to the nonvolatile memory. All inputs are disabled
during this write cycle, and the EEPROM will not respond until the write is complete.
Figure 8-1. Byte Write
S
W
T
R
A
I
R ^Device
T
T Address
E
Word Address
S
T
O
Data
P
SDA Line
M
LRA M
LA
A
S
S/C S
SC
C
B
BW K B
BK
K
* ^{= Don’t care bit for 1K}
Page Write: The 1K/2K EEPROM are capable of an 8-byte Page Write. The 4K/8K EEPROM devices are
capable of 16-byte Page Writes.
A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a Stop condition after
the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the
microcontroller can transmit up to seven (1K/2K) or fifteen (4K/ 8K) more data words. The EEPROM will
respond with a zero after each data word received. The microcontroller must terminate the Page Write
sequence with a Stop condition.
The data word address lower three (1K/2K) or four (4K/8K) bits are internally incremented following the receipt
of each data word. The higher data word address bits are not incremented, retaining the memory page row
location. When the word address, internally generated, reaches the page boundary, the next byte sent will be
written to the beginning address on the same page. In order words, if more than eight (1K/2K) or sixteen (4K/8K)
data words are transmitted to the EEPROM, the data word address will “roll over” and the data previously sent
to the device at the beginning of the page write sequence will be altered.
Figure 8-2. Page Write
SDA Line
S
W
T
R
A
I
R ^Device
T
T Address E Word Address (n)
M
LR A
M
A
S
S/ C
S
C
B
BW K
B
K
Data (n)
S
T
O
P Data (n + 1)
A
A
C
C
K
K
S
T
O
Data (n + x) P
A
C
K
* ^{= Don’t care bit for 1K}
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a start condition followed by the device address
word. The read/write bit state is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero, allowing the read or write sequence to continue.
AT24C01C/02C/04C/08C Automotive [DATASHEET] 11
Atmel-8819B-SEEPROM-AT24C01C-02C-04C-08C-Auto-Datasheet_072014