ATMEGA329_07 Datasheet, PDF (108/392 Pages) ATMEL Corporation – 8-bit Microcontroller with In-System Programmable Flash

Enabling and disabling of the clock input must be done when T1/T0 has been stable for at least
one system clock cycle, otherwise it is a risk that a false Timer/Counter clock pulse is generated.
Each half period of the external clock applied must be longer than one system clock cycle to
ensure correct sampling. The external clock must be guaranteed to have less than half the sys-
tem clock frequency (f_ExtClk < f_{clk_I/O}/2) given a 50/50% duty cycle. Since the edge detector uses
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f_{clk_I/O}/2.5.
An external clock source can not be prescaled.
Figure 16-2. Prescaler for Timer/Counter0 and Timer/Counter1⁽¹⁾
clk_I/O
Clear
PSR10
T0
Synchronization
T1
Synchronization
clk_T1
clk_T0
Note: 1. The synchronization logic on the input pins (T1/T0) is shown in Figure 16-1.
16.1 Register Description
16.1.1 GTCCR – General Timer/Counter Control Register
Bit
7
6
5
4
0x23 (0x43)
TSM
–
–
–
Read/Write
R/W
R
R
R
Initial Value
0
0
0
0
3
2
1
0
–
–
PSR2 PSR10 GTCCR
R
R
R/W
R/W
0
0
0
0
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR2 and PSR10 bits is kept, hence keeping the corresponding pres-
caler reset signals asserted. This ensures that the corresponding Timer/Counters are halted and
can be configured to the same value without the risk of one of them advancing during configura-
tion. When the TSM bit is written to zero, the PSR2 and PSR10 bits are cleared by hardware,
and the Timer/Counters start counting simultaneously.
• Bit 0 – PSR10: Prescaler Reset Timer/Counter1 and Timer/Counter0
108 ATmega329/3290/649/6490
2552J–AVR–08/07