ATMEGA406_14 Datasheet, PDF (101/263 Pages) ATMEL Corporation – High Performance, Low Power AVR

ATmega406
16.6.2
• Bit 2:0 – CS1[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 16-1. CS1[2:0] - Clock Select Bit Description
CS12 CS11 CS10 Description
0
0
0
No clock source (Timer/counter stopped).
0
0
1
clk_I/O/1 (No prescaling)
0
1
0
clk_I/O/8 (From prescaler)
0
1
1
clk_I/O/32 (From prescaler)
1
0
0
clk_I/O/64 (From prescaler)
1
0
1
clk_I/O/128 (From prescaler)
1
1
0
clk_I/O/256 (From prescaler)
1
1
1
clk_I/O/1024 (From prescaler)
TCNT1H and TCNT1L – Timer/Counter1
Bit
(0x85)
(0x84)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
TCNT1[15:8]
TCNT1H
TCNT1[7:0]
TCNT1L
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit
Registers” on page 96.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a com-
pare match between TCNT1 and one of the OCR1x Registers.
Writing to the TCNT1 register blocks (removes) the compare match on the following timer clock
for all compare units.
16.6.3 OCR1AH and OCR1AL – Output Compare Register 1 A
Bit
(0x89)
(0x88)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
OCR1A[15:8]
OCR1AH
OCR1A[7:0]
OCR1AL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
The Output Compare Register contains a 16-bit value that is continuously compared with the
counter value (TCNT1).
The Output Compare Register is 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary high byte register (TEMP). This temporary register is shared by all the other 16-
bit registers. See “Accessing 16-bit Registers” on page 96.
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