|
AT90PWM3_08 Datasheet, PDF (101/361 Pages) ATMEL Corporation – 8-bit Microcontroller with 8K Bytes In-System Programmable Flash | |||
|
◁ |
The OCF0A bit is set when a Compare Match occurs between the Timer/Counter0 and the data
in OCR0A â Output Compare Register0. OCF0A is cleared by hardware when executing the cor-
responding interrupt handling vector. Alternatively, OCF0A is cleared by writing a logic one to
the flag. When the I-bit in SREG, OCIE0A (Timer/Counter0 Compare Match Interrupt Enable),
and OCF0A are set, the Timer/Counter0 Compare Match Interrupt is executed.
⢠Bit 0 â TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by
writing a logic one to the flag. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow Interrupt
Enable), and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed.
The setting of this flag is dependent of the WGM02:0 bit setting. Refer to Table 14-8, âWaveform
Generation Mode Bit Descriptionâ on page 99.
102 AT90PWM2/3/2B/3B
4317IâAVRâ01/08
|
▷ |