ATA6560_14 Datasheet, PDF (10/17 Pages) ATMEL Corporation – High-speed CAN Transceiver with Standby Mode CAN FD Ready

6. Electrical Characteristics (Continued)
T_j = –40°C to +150°C; V_CC = 4.5V to 5.5V; V_IO = 2.8V to 5.5V; R_L = 60Ω, C_L = 100pF unless specified otherwise; all voltages are
defined in relation to ground; positive currents flow into the IC.
No. Parameters
Test Conditions
Symbol
Min.
Typ.
Max. Unit
6.3
Bus differential output
voltage
V_TXD = 0V, T < t_to(dom)TXD
R_L = 45Ω to 65Ω
V_VCC=4.75V to 5.25V
V_TXD = V_VIO, receive, no load
V_O(dif)bus
1.5
–50
3
V
+50
mV
6.4 Recessive output voltage
Normal and silent modes,
V_TXD = V_VIO, no load
V_O(rec)
2
0.5 x V_VCC
3
V
6.5
Differential receiver
threshold voltage (HSC)
Normal and silent modes,
V_cm(CAN) = –27V to +27V
V_th(RX)dif
0.5
0.7
0.9
V
6.6
Differential receiver
hysteresis voltage (HSC)
Normal and silent modes,
V_cm(CAN) = –27V to +27V
V_hys(RX)dif
50
120
200
mV
6.7 Dominant output current
V_TXD = 0V, T < t_to(dom)TXD, V_VCC = 5V
- pin CANH, V_CANH = 0V
- pin CANL, V_CANL = 5V/40V
I_IO(dom)
–100
35
–35
mA
100
mA
Normal and silent modes,
6.8 Recessive output current V_TXD = V_VIO, no load,
I_IO(rec)
–5
V_CANH = V_CANL = –27V to +32V
+5
mA
6.9 Leakage current
V_VCC = V_VIO = 0V,
V_CANH = V_CANL = 5V
I_IO(rec)
–5
0
+5
µA
6.10 Input resistance
R_i
9
15
28
kΩ
6.11 Input resistance deviation Between V_CANH and V_CANL
ΔR_i
–1
0
+1
%
6.12 Differential input resistance
T_j < 125°C
R_i(dif)
19
30
52
kΩ
R_i(dif)
20
30
52
kΩ
6.13
Common-mode
capacitance
input
C_i(cm)
20
pF
6.14 Differential input capacitance
C_i(dif)
8 Transceiver Timing, Pins CANH, CANL, TXD, and RXD, see Figure 6-1 and Figure 6-2
10
pF
8.1
Delay time from TXD to bus
dominant
Normal mode
t_{d(TXD-busdom)}
40
130
ns
8.2
Delay time from TXD to bus
recessive
Normal mode
t_{d(TXD-busrec)}
40
130
ns
8.3
Delay time from bus
dominant to RXD
8.4
Delay time from bus
recessive to RXD
Normal and silent modes
Normal and silent modes
t_d(busdom-
20
RXD)
t_{d(busrec-RXD)}
20
100
ns
100
ns
Normal mode
Rising edge at pin TXD
Falling edge at pin TXD
8.5
Propagation delay from TXD
to RXD
Normal mode
R_L = 120Ω, C_L = 200pF
Rising edge at pin TXD
Falling edge at pin TXD
t_PD(TXD-RXD)
40
40
t_PD(TXD-RXD)
200
ns
200
ns
300
ns
300
ns
8.6 TXD dominant time-out time V_TXD = 0V, normal mode
t_to(dom)TXD
0.8
3
ms
8.7 Bus wake-up time-out time Standby Mode
t_{to_bus}
0.8
3
ms
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. Only for Atmel ATA6560; otherwise the values are part of the VCC pin specification.
Type*
A
A
A
A
A
A
A
A
A
A
B
D
D
C
C
C
C
A
A
D
D
A
A
10 ATA6560/ATA6561 [DATASHEET]
9288I–AUTO–09/14