T48C510 Datasheet, PDF (1/61 Pages) ATMEL Corporation – MARC4 -4-bit MTP Universal Microcontroller

T48C510
MARC4 – 4-bit MTP Universal Microcontroller
The T48C510 is an Multi Time Programmable (MTP) microcontroller which is pin and functionally compatible to the
Atmel Wireless & Microcontrollers’ M44C510E mask programmable microcontroller. It contains EEPROM, RAM,
up to 34 digital I/O pins, up to 10 maskable external interrupt sources, 4 maskable internal interrupts, a watchdog timer,
interval timer, 2 x 8-bit multifunction timer/counter module and a versatile software configurable on-chip system clock
module.
Features / Benefits
D Programmable system clock with prescaler and five
different clock sources:
– Up to 8-MHz crystal oscillator (system clock)
– 32-kHz crystal oscillator
– RC-oscillator fully integrated
– RC-oscillator with external resistor adjustment
– External clock input
D Wide supply-voltage range (2.4 V to 6.2 V)
D Very low halt current
D 4 KByte program EEPROM, 256 x 4-bit RAM
D I/O ports – bitwise configurable with combined inter-
rupt handling (for serial I/O applications)
D 2 x 8-bit multifunction timer/counters
D Coded reset and watchdog timer
D Power-on reset and “brown out” function
D Various power-down modes
D Efficient, hardware-controlled interrupt handling
D High-level programming language in qFORTH
D 8 hard- and software interrupt priority levels
D Comprehensive library of useful routines
D Up to 10 external and 4 internal interrupts, bitwise D Windows 95/NT based development and programmer
maskable with programmable priority level
tools
D Up to 34 I/O lines
TE SCLIN OSCIN OSCOUT AVDD VSS NRST VDD TIM1
Config.
EEPROM
Test
System Real time
Sleep ^clock
clock
Master
reset
EEPROM RAM
4K x 8 bit 256 x 4 bit
MARC4
4-bit CPU core
Watch–
dog
Prescaler
I/O bus
Timer/
counter
Timer 1
Timer 0
Melody
& buzzer
I/O
I/O
I/O
I/O
I/O I/O
I/O
I/O
I/O
Interrupt
& reset
Interrupt
Interrupt
4
4
4
4
4
4
4
2
4
PM Port 0 Port 1 Port 5 Port 7 Port A
Port B Port C Port 6 Port 4
16536
Figure 1. Block diagram
Rev. A2, 26-Feb-01
1 (61)
Preliminary Information