M672061H_14 Datasheet, PDF (1/4 Pages) ATMEL Corporation – Empty, Full and Half Flags in Single Device Mode

Active Errata List
• Reading Errors
• Empty Flag Parasitic Pulse
Errata History
Lot Number
M67206H, M672061H, M67204H all lot numbers
Errata List
1, 2
Errata Description
1. Reading errors.
Description
Sometimes a bit that has been written "1" is read "0".
Failure Conditions
1. Read and write commands fall down almost at the same time, t_WLRL
parameter in the hereunder table.
2. Write bit “0” on input port while a bit “1” is expected on output port.
3. Reading the 64^th+1 _{(mod 64)} location (16^th +1 _{(mod 16)} for 4Kx9 FIFO) vs. the
writing location.
4. Read pulse (t_RLRH) less than the one specified in the hereunder table.
WR
RD
t_WLRL
I_n
Q_n
Writing Data _n
Reading Data _{n+64+1(mod 64)}
t_RLRH
(n+16+1(mod 16))
“0” written
H.Z
“1” expected,
“0” read
H.Z
Root Cause
The memory array of the 16Kx9 FIFO contains 64 columns, the 4Kx9 contains 16
columns. To reduce the read access time, a pipe line has been implemented on
the data path. When the data_n is going out of the FIFO, the data_n+1 is pre-
fetched for the next read access. When the internal writing and reading are dif-
ferent from 64 _{(mod 64)} (16 _{(mod 16)} ), a write and a read access are made on the
same column. Coupling between the read bit-line and the write bit-line only dis-
turbs the pre-fetch operation, forcing the sense amplifier to output “0”. Then, the
next external reading may be wrong.
Characterization
Worst case condition: 125°C / 4.5V
67206H /
672061H
67204H
t_WLRL
minimum maximum
≥ 0 ns
≤ 8 ns
≥ -2 ns
≤ 8 ns
t_RLRH
≤ 30 ns
≤ 25 ns
Radiation
Tolerant FIFOs
M67206H
M672061H
M67204H
Errata Sheet
4425B–AERO–01/06