ATV750 Datasheet, PDF (1/14 Pages) ATMEL Corporation – High Density UV Erasable Programmable Logic Device

Features
• Third Generation Programmable Logic Structure
– High-Density Replacement for Discrete Logic
• High-Speed — Plus a New, Low-Power Version
• Increased Logic Flexibility
– 42 Inputs and 20 Sum Terms
• Flexible Output Logic
– 20 Flip-Flops - 10 Extra
– All Can Be Individually Buried or 10 Output Directly
– Each has Individual Asynchronous Reset and Clock Terms
• Multiple Feedback Paths Provide for Buried State Machines
and I/O Bus Compatibility
• Proven and Reliable High-Speed CMOS EPROM Process
– 2000V ESD Protection
– 200 mA Latchup Immunity
• Reprogrammable
– Tested 100% for Programmability
• 24-pin, 300-mil Dual-In-line and 28-Lead Surface Mount Packages
Logic Diagram
High Density UV
Erasable
Programmable
Logic Device
ATV750
ATV750L
Description
The ATV750(L) is 100% more powerful than most other programmable logic devices
in 24-pin packages. Increased product terms, sum terms, and flip-flops translate into
more usable gates.
Each of the ATV750(L)’s twenty-two logic pins can be used as an input. Ten of these
can be used as input, output, or bi-directional I/O pins. All twenty flip-flops can be fed
back into the array independently. This flexibility allows burying all of the sum terms
and flip-flops.
There are 171 product terms available. A variable format is used to assign between
four and eight product terms per sum term. There are two sum terms per output, pro-
viding added flexibility.
Pin Configurations
Pin Name Function
IN
Logic Inputs
I/O
Bidirectional Buffers
*
VCC
No Internal Connection
+5V Supply
DIP/SOIC
IN 1
IN 2
IN 3
IN 4
IN 5
IN 6
IN 7
IN 8
IN 9
IN 10
IN 11
GND 12
24 VCC
23 I/O
22 I/O
21 I/O
20 I/O
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 IN
(continued)
PLCC/LCC
(Top View)
IN 5
IN 6
IN 7
*8
IN 9
IN 10
IN 11
25 I/O
24 I/O
23 I/O
22 *
21 I/O
20 I/O
19 I/O
Rev. 0024E–05/98
1