ATTINY23U Datasheet, PDF (1/1 Pages) ATMEL Corporation – Routing&Socket card

5
4
3
ATTiny23U / ATTiny43U Routing&Socket card
See layout guidelines for floorplan
Keep capacitors close to IC pins
2
1
J1 and J2 goes down to the mother
board.
SILK: USAGE:
BOOST regulator:
D
open Vtarget jumper on mainboard
short J8
PA0 ^GPA^N0^D
PA2 PA2
PA4 PA4
PA6 PA6
PB0 ^GPB^N0^D
PB2 PB2
PB4 PB4
PB6 PB6
G_PCN₀D
PC2
PC4
PC6
J1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V_PAT₁G _PA1
PA3 PA3
PA5 PA5
PA7 PA7
V_PBT₁G _PB1
PB3 PB3
PB5 PB5
PB7 PB7
V_PCT₁G
PC3
PC5
PC7
strap wire from mainboard Vtarget pin1 to J3 (Vbat) pin 1
w/o BOOST regulator
short J3 (Vbat)
open J8
short Vtarget jumper on mainboard
JS3
VTG
C43
100n
R16
680R
C37
100n
GND
GND
PB7
6
7
8
LSW_MLF ₉
10
PB7 [INT0]
VCC
GND
LSW
VBAT
U4
ATtiny43U-MLF
PB1 [OC0A]
PB0 [TO]
PA7 [RST-dW]
PA6 [CLKI]
PA5 [AIN1]
20
19
18
17
16
PB1
PB0
PA7
PA6
PA5
G_PDN₀D
31
33
32
34
V_PDT₁G
PD2
35
36
PD3
PD4
37
38
PD5
PD6
39
40
PD7
YMJ-02-O-BK
GND
GND
G_PEN₀D
41
43
42
44
V_PET₁G
PE2
45
46
PE3
PE4
47
48
PE5
PE6
49
50
PE7
C
GND
51
52
VTG
PF0
53
54
PF1
PF2
55
56
PF3
PF4
57
58
PF5
PF6
59
60
PF7
G_PGN₀D
61
63
62
64
V_PGT₁G
PG2
65
66
PG3
PG4
67
68
PG5
PG6
69
70
PG7
G_PHN₀D
71
73
72
74
P^VH^T1^G
PH2
75
76
PH3
PH4
77
78
PH5
PH6
79
80
PH7
Silk: J3 (Vbat)
"pin1 +" and "pin2 -"
NOTE: When connecting external
power to J3
- open Vtarget on mainboard
- short J8
J3
1
2
CD075014 1X2
C31 + C32
100p
10u
BATS
C27
4.7u
L1
LSW
MSS6132-153ML
GND
R51
2k
C52
100p
Silk: J8
Short J8 to connect Boost to
VCC / VTG
D1
MBR0520L_NL
2
1
C40
22 uF
C41
22 uF
GND
GND
J8
CD075014 1X2
2
1
VTG
PA6 ^GXT^NA^DL1
XTAL2
G_toN_sD_c1
tosc2
PA7 reset
GND
VCC
81
83
82
84
a^Vr^Te^Gf0
85
86
87
88
MOSI
PB4
89
90
MISO
PB5
91
92
SCK
PB6
93
94
tdi
95
96
tdo
97
98
tms
99
100 ^tck
Mating FSI-150
B
LSW_SOIUC5
R15
680R
C36
100n
GND
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
11
12
13
14
15
16
17
18
19
20
LSW
GND
VBAT
VCC
[ADC0] PA0
PB7 [INT0]
[ADC1] PA1 PB6 [USCK-SCL]
[ADC2] PA2 PB5 [DO-OC1B]
[ADC3] PA3 PB4 [DI-OC1A]
[AIN0] PA4 PB3 [T1-CLKO]
[AIN1] PA5
PB2 [OC0B]
[CLKI] PA6
PB1 [OC0A]
[RST-dW] PA7
PB0 [TO]
10
9
8
7
6
5
4
3
2
1
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
GND
C42
100n
GND
J1
GN_PD_J0
PJ2
PJ4
PJ6
GN_PD_K0
PK2
PK4
PK6
GN_PD_L0
PL2
PL4
PL6
GN_PD_M0
PM2
PM4
PM6
GN_PD_N0
PN2
PN4
PN6
GN_PD_P0
PP2
PP4
PP6
GN_PD_Q0
PQ2
PQ4
PQ6
dp
dn
usbid
PB0 PD^GAT^NA^D0
PB2 PDATA2
PB4 PDATA4
PB6 PDATA6
PCTRL0bs2
PA4 PCTRL2oe
PA3 PCTRL4bs1
PA2 PCTRL6xa1
BOARD_ID0
GND ^BOARD_ID4
J2
1
3
2
4
PJ1^VTG
5
6
PJ3
7
8
PJ5
9
10
PJ7
11
13
12
14
PK1^VTG
15
16
PK3
17
18
PK5
19
20
PK7
21
23
22
24
PL1^VTG
25
26
PL3
27
28
PL5
29
30
PL7
31
33
32
34
PM1^VTG
35
36
PM3
37
38
PM5
39
40
PM7
41
43
42
44
PN1^VTG
45
46
PN3
47
48
PN5
49
50
PN7
51
53
52
54
PP1^VTG
55
56
PP3
57
58
PP5
59
60
PP7
61
63
62
64
PQ1^VTG
65
66
PQ3
67
68
PQ5
69
70
PQ7
71
72 ^vbus
73
74 ^uvcon
75
76
VCC
77
78
79
80
PDATA1 PB1
81
82
PDATA3 PB3
83
84
PDATA5 PB5
85
86
PDATA7 PB7
87
88
rdy PCTRL1 PA5
89
90
wr PCTRL3 PA0
91
92
xa0 PCTRL5 PA1
93
94
pagel PCTRL7
95
96
BOARD_ID1
97
98
99
100
BOARD_ID5
Mating FSI-150
VCC
U1
ISP
ATtiny43U-SOIC
ID: 0x09
a: 0
b: /(A XOR B)
ev A XNOR B
3
1
6
I0
I1
I2
Y4
D
J2
C
B
PROG DATA
J9
1
2
3
4
5
6
7
8
9
10
CD075014 2X5
A
J11
1
3
5
MISO VCC
SCK MOSI
RESET GND
2
4
6
CD075014 2X3
SOCKET_RESET
ST1
1
2
3
4
5
6
7
8
9
10
PB0 [TO]
[RST-dW] PA7
PB1 [OC0A]
[CLKI] PA6
PB2 [OC0B]
[AIN1] PA5
PB3 [T1-CLKO] [AIN0] PA4
PB4 [DI-OC1A] [ADC3] PA3
PB5 [DO-OC1B] [ADC2] PA2
PB6 [USCK-SCL] [ADC1] PA1
PB7 [INT0]
[ADC0] PA0
VCC
VBAT
GND
LSW
20
19
18
17
16
15
14
13
12
11
652D0202211-001
PROG CTRL
J10
1
2
3
4
5
6
7
8
9
10
CD075014 2X5
E3
E4
GND
NC7SZ57P6X
GND
VCC
C22
100n
GND
PCB1
A
A08-0409.C
C44
100n
J12 AUX
Be aware of conflicting componentsGND
on STK600 while placing J12 !
1
2
XTAL1
3
4
SOCKET_RESET ₅
6
7
8
GND
9
10
VCC
CD075014 2X5
5
4
E7
E5
E6
FIDUCIAL FIDUCIAL FIDUCIAL
3
GND
GND
PCB Clip Hole, STGKN6D00 RoutinPgCcBaCrdlip Hole, STK600 Routing card
E1
E2
GND
PCB Clip Hole, STGKN6D00 RoutinPgCcBaCrdlip Hole, STK600 Routing card
2
ATMEL Norway AS
Vestre Rosten 79
N-7075 TILLER
Norway
Title
Size
A3
STK600 socket card ATTiny23V / ATTiny43V
Document Number
<Doc>
Date: Wednesday, March 05, 2008 Sheet 1
1
of 1
Rev
PC2