ATR0621P_08 Datasheet, PDF (1/31 Pages) ATMEL Corporation – GPS Baseband GPS Baseband

Features
• 16 Channel GPS Correlator
– 8192 Search Bins with GPS Acquisition Accelerator
– Accuracy: 2.5m CEP (Stand-Alone, S/A off)
– Time to First Fix: 34s (Cold Start)
– Acquisition Sensitivity: –140 dBm
– Tracking Sensitivity: –150 dBm
• Utilizes the ARM7TDMI^® ARM^® Thumb^® Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– EmbeddedICE^™ (In-circuit Emulator)
• 128 Kbyte Internal RAM
• 384 Kbyte Internal ROM, Firmware Version V5.0
• Position Technology Provided by u-blox
• Fully Programmable External Bus Interface (EBI)
– Maximum External Address Space of 8 Mbytes
– Up to 4 Chip Selects
– Software Programmable 8-bit/16-bit External Data Bus
• 6-channel Peripheral Data Controller (PDC)
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller
– 2 External Interrupts
• 32 User-programmable I/O Lines
• 1 USB Device Port
– Universal Serial Bus (USB) V2.0 Full-speed Device
– Embedded USB V2.0 Full-speed Transceiver
– Suspend/Resume Logic
– Ping-pong Mode for Isochronous and Bulk Endpoints
• 2 USARTs
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
• Master/Slave SPI Interface
– 2 Dedicated Peripheral Data Controller (PDC) Channels
– 8-bit to 16-bit Programmable Data Length
– 4 External Slave Chip Selects
• Programmable Watchdog Timer
• Advanced Power Management Controller (APMC)
– Peripherals Can Be Deactivated Individually
– Geared Master Clock to Reduce Power Consumption
– Sleep State with Disabled Master Clock
– Hibernate State with 32.768 kHz Master Clock
• Real Time Clock (RTC)
• 2.3V to 3.6V or 1.8V Core Supply Voltage
• Includes Power Supervisor
• 1.8V to 3.3V User-definable I/O Voltage for Several GPIOs with 5V Tolerance
• 4 Kbytes Battery Backup Memory
• 9 mm × 9 mm 100-pin BGA Package (LFBGA100)
• RoHS-compliant
GPS Baseband
Processor
ATR0621P
4890H–GPS–08/08