ATNGW100 Datasheet, PDF (1/13 Pages) ATMEL Corporation – ATMEL Norway AS Vestre Roster 79 N-7075 TUKKER Norway

5
4
D
VCC_3V3
VCC_3V3
VCC_3V3
R8
220R
R3
220R
R4
220R
D1
D3
D2
B
A
SYSTEM
C
B
VCC_3V3
J15
1
2
CD075014 1X2
R101
1k
R100
100k
5,10 SPI_0_MISO
5,10 SPI_0_MOSI
5,10 SPI_0_SCK
5,10 SPI_0_CS0
10 PA04
10 PA05
10 TWI_SDA
10 TWI_SCL
10 PA08
10 PA09
7 MCI_CLK
7 MCI_CMD
7 MCI_D0
7 MCI_D1
7 MCI_D2
7 MCI_D3
8 USART_1_RXD
8 USART_1_TXD
10 SPI_0_NPCS3
10 PA21
10 PA22
10 PA23
10 PA24
10 PA25
10 PA26
10 PA27
10 PA28
10 PA29
10 PA30
10 PA31
10,11 PB00
10,11 PB01
10,11 PB02
10,11 PB03/EVTO
10,11 PB04
10,11 PB05
10,11 PB06
10,11 PB07
10,11 PB08
10,11 PB09
10 PB10
10 PB11
10 PB12
10 PB13
10 PB14
10 PB15
10 PB16
10 PB17
10 PB18
10 PB19
10 PB20
10 PB21
10 PB22
10 PB23
10 PB24
10 PB25
10 PB26
10 PB27
9 PB28/EXTINT3
9 PB29
11 EVTI_N
A
3
2
1
AP7000_1
U1A
K4
K2
K3
K6
K7
K1
A10
C10
L4
L1
M4
M2
M5
M3
M1
N4
N2
N3
N1
P2
P1
P3
R1
R3
T3
P8
R8
K9
L9
M9
N9
R9
PA00 [SPI0 - MISO / SSC1 - RX_FRAME_SYNC]
PA01 [SPI0 - MOSI / SSC1 - TX_FRAME_SYNC]
PA02 [SPI0 - SCK / SSC1 - TX_CLOCK]
PA03 [SPI0 - NPCS0 / SSC1 - RX_CLOCK]
PA04 [SPI0 - NPCS1 / SSC1 - TX_DATA]
PA05 [SPI0 - NPCS2 / SSC1 - RX_DATA]
PA06 [TWI - SDA / USART0 - RTS]
PA07 [TWI - SCL / USART0 - CTS]
PA08 [PSIF - CLOCK0 / USART0 - RXD]
PA09 [PSIF - DATA0 / USART0 - TXD]
PA10 [MMCI - CLK / USART0 - CLK]
PA11 [MMCI - CMD0 / TIMER0 - CLK0]
PA12 [MMCI - DATA0 / TIMER0 - A0]
PA13 [MMCI - DATA1 / TIMER0 - A1]
PA14 [MMCI - DATA2 / TIMER0 - A2]
PA15 [MMCI - DATA3 / TIMER0 - B0]
PA16 [USART1 - CLK / TIMER0 - B1]
PA17 [USART1 - RXD / TIMER0 - B2]
PA18 [USART1 - TXD / TIMER0 - CLK2]
PA19 [USART1 - RTS / TIMER0 - CLK1]
PA20 [USART1 - CTS / SPI0 - NPCS3]
PA21 [SSC0 - RX_FRAME_SYNC / PWM - PWM2]
PA22 [SSC0 - RX_CLOCK / PWM - PWM3]
PA23 [SSC0 - TX_CLOCK / TIMER1 - A0]
PA24 [SSC0 - TX_FRAME_SYNC / TIMER1 - A1]
PA25 [SSC0 - TX_DATA / TIMER1 - B0]
PA26 [SSC0 - RX_DATA / TIMER1 - B1]
PA27 [SPI1 - NPCS3 / TIMER1 - CLK0]
PA28 [PWM - PWM0 / TIMER1 - A2]
PA29 [PWM - PWM1 / TIMER1 - B2]
PA30 [SM - GCLK0 / TIMER1 - CLK1]
PA31 [SM - GCLK1 / TIMER1 - CLK2]
E12
E14
E16
D13
D15
D14
D16
C15
C16
C14
B14
A14
C13
A13
B13
D12
A12
C12
B12
E11
D11
A11
C11
B11
L6
L2
T9
J9
M10
R13
P13
PB00 [ISI - DATA0 / SPI1 - MISO / AUX1 - MSEO0]
PB01 [ISI - DATA1 / SPI1 - MOSI / AUX1 - MSEO1]
PB02 [ISI - DATA2 / SPI1 - NPCS0 / AUX1 - MCKO]
PB03 [ISI - DATA3 / SPI1 - NPCS1 / AUX1 - EVTO]
PB04 [ISI - DATA4 / SPI1 - NPCS2 / AUX1 - MDO0]
PB05 [ISI - DATA5 / SPI1 - SCK / AUX1 - MDO1]
PB06 [ISI - DATA6 / MMCI - CMD1 / AUX1 - MDO2]
PB07 [ISI - DATA7 / MMCI - DATA4 / AUX1 - MDO3]
PB08 [ISI - HSYNC / MMCI - DATA5 / AUX1 - MDO4]
PB09 [ISI - VSYNC / MMCI - DATA6 / AUX1 - MDO5]
PB10 [ISI - PCLK / MMCI - DATA7]
PB11 [PSIF - CLOCK1 / ISI - DATA8]
PB12 [PSIF - DATA1 / ISI - DATA9]
PB13 [SSC2 - TX_DATA / ISI - DATA10]
PB14 [SSC2 - RX_DATA / ISI - DATA11]
PB15 [SSC2 - TX_CLOCK / USART3 - CTS]
PB16 [SSC2 - TX_FRAME_SYNC / USART3 - RTS]
PB17 [SSC2 - RX_FRAME_SYNC / USART3 - TXD]
PB18 [SSC2 - RX_CLOCK / USART3 - RXD]
PB19 [SM - GCLK2 / USART3 - CLK]
PB20 [DAC - DATA1 / AUDIOC - SDO]
PB21 [DAC - DATA0 / AUDIOC - SYNC]
PB22 [DAC - DATAN1 / AUDIOC - SCLK]
PB23 [DAC - DATAN0 / AUDIOC - SDI]
PB24 [- / DMAC - DMARQ0 / NMI - NMI_N]
PB25 [- / DMAC - DMARQ1 / IRQ - EXTINT0]
PB26 [- / USART2 - RXD / IRQ - EXTINT1]
PB27 [- / USART2 - TXD / IRQ - EXTINT2]
PB28 [- / USART2 - CLK / AUX2 - EVTO / IRQ - EXTINT3]
PB29 [SM - GCLK3 / USART2 - CTS]
PB30 [SM - GCLK4 / USART2 - RTS]
J8 _EVTI
PC00 [MACB0-COL / - / AUX2 - MSEO0]
PC01 [MACB0 - CRS / - / AUX2 - MSEO1]
PC02 [MACB0 - TX_ER / - / AUX2 - MCKO]
PC03 [MACB0 - TXD0 / -]
PC04 [MACB0 - TXD1 / -]
PC05 [MACB0 - TXD2 / DMAC - DMARQ2 / AUX2 - MDO0]
PC06 [MACB0 - TXD3 / DMAC - DMARQ3 / AUX2 - MDO1]
PC07 [MACB0 - TX_EN / -]
PC08 [MACB0 - TX_CLK / -]
PC09 [MACB0 - RXD0 / -]
PC10 [MACB0 - RXD1 / -]
PC11 [MACB0 - RXD2 / - / AUX2 - MDO2]
PC12 [MACB0 - RXD3 / - / AUX2 - MDO3
PC13 [MACB0 - RX_ER / -]
PC14 [MACB0 - RX_CLK / - / AUX2 - MDO4]
PC15 [MACB0 - RX_DV / -]
PC16 [MACB0 - MDC / -]
PC17 [MACB0 - MDIO / -]
PC18 [MACB0 - SPEED / - / AUX2 - MDO5]
PC19 [LCDC - CC / MACB1 - COL]
PC20 [LCDC - HSYNC / -]
PC21 [LCDC - PCLK / -]
PC22 [LCDC - VSYNC / -]
PC23 [LCDC - DVAL / MACB1 - CRS]
PC24 [LCDC - MODE / MACB1 - RX_CLK]
PC25 [LCDC - PWR / -]
PC26 [LCDC - DATA0 / MACB1 - TX_ER]
PC27 [LCDC - DATA1 / MACB1 - TXD2]
PC28 [LCDC - DATA2 / MACB1 - TXD3]
PC29 [LCDC - DATA3 / MACB1 - RXD2]
PC30 [LCDC - DATA4 / MACB1 - RXD3]
PC31 [LCDC - DATA5 / -]
R14
T14
P14
T15
R15
H10
H11
H14
H16
H9
G12
G13
G15
G14
G11
G10
B16
B15
D10
B10
G9
F9
D9
A9
C9
B9
G8
F8
E8
D8
B8
C8
R1
R2 ^33R
R7 ^33R
33R
R9
33R
R5
33R
R6
33R
R10
33R
PD00 [LCDC - DATA6 / -]
PD01 [LCDC - DATA7 / -]
PD02 [LCDC - DATA8 / MACB1 - MDIO]
PD03 [LCDC - DATA9 / MACB1 - MDC]
PD04 [LCDC - DATA10 / MACB1 - RX_DV]
PD05 [LCDC - DATA11 / MACB1 - RX_ER]
PD06 [LCDC - DATA12 / MACB1 - RXD1]
PD07 [LCDC - DATA13 / -]
PD08 [LCDC - DATA14 / -]
PD09 [LCDC - DATA15 / -]
PD10 [LCDC - DATA16 / MACB1 - RXD0]
PD11 [LCDC - DATA17 / MACB1 - TX_EN]
PD12 [LCDC - DATA18 / MACB1 - TX_CLK]
PD13 [LCDC - DATA19 / MACB1 - TXD0]
PD14 [LCDC - DATA20 / MACB1 - TXD1]
PD15 [LCDC - DATA21 / MACB1 - SPEED]
PD16 [LCDC - DATA22 / -]
PD17 [LCDC - DATA23 / -]
C2
C1
D3
H6
H5
H4
H1
H3
J7
J6
R2
P4
T4
R4
N5
T5
P5
R5
R12
33R
R11
33R
R13
33R
PE00 [EBI - DATA16 / LCDC - CC]
PE01 [EBI - DATA17 / LCDC - DVAL]
PE02 [EBI - DATA18 / LCDC - MODE]
PE03 [EBI - DATA19 / LCDC - DATA0]
PE04 [EBI - DATA20 / LCDC - DATA1]
PE05 [EBI - DATA21 / LCDC - DATA2]
PE06 [EBI - DATA22 / LCDC - DATA3]
PE07 [EBI - DATA23 / LCDC - DATA4]
PE08 [EBI - DATA24 / LCDC - DATA8]
PE09 [EBI - DATA25 / LCDC - DATA9]
PE10 [EBI - DATA26 / LCDC - DATA10]
PE11 [EBI - DATA27 / LCDC - DATA11]
PE12 [EBI - DATA28 / LCDC - DATA12]
PE13 [EBI - DATA29 / LCDC - DATA16]
PE14 [EBI - DATA30 / LCDC - DATA17]
PE15 [EBI - DATA31 / LCDC - DATA18]
PE16 [EBI - ADDR23 / LCDC - DATA19]
PE17 [EBI - ADDR24 / LCDC - DATA20]
PE18 [EBI - ADDR25 / LCDC - DATA21]
PE19 [EBI - CFCE1 / -]
PE20 [EBI - CFCE2 / -]
PE21 [EBI - NCS4 / -]
PE22 [EBI - NCS5 / -]
PE23 [EBI - CFRNW / -]
PE24 [EBI - NWAIT / -]
PE25 [EBI - NCS2 / -]
PE26 [EBI - SDCS / -]
C6
E6
A6
D5
B5
E5
C5
A5
D4
B4
C4
A4
B3
A3
C3
A2
B2
D1
D2
T11
M11
P11
N11
R11
L11
T10
H12
ETH_0_COL 3
ETH_0_CRS 3
ETH_0_TXD0 3
ETH_0_TXD1 3
ETH_0_TXD2 3
ETH_0_TXD3 3
ETH_0_TX_EN 3
ETH_0_TX_CLK 3
ETH_0_RXD0 3
ETH_0_RXD1 3
ETH_0_RXD2 3
ETH_0_RXD3 3
ETH_0_RX_ER 3
ETH_0_RX_CLK 3
ETH_0_RX_DV 3
ETH_0_MDC 3
ETH_0_MDIO 3
ETH_1_COL 4
PC20
10
PC21
10
PC22
10
ETH_1_CRS 4
ETH_1_RX_CLK 4
SD_DETECT 7
ETH_1_TXD2 4
ETH_1_TXD3 4
ETH_1_RXD2 4
ETH_1_RXD3 4
PC31
10
PD00
10
PD01
10
ETH_1_MDIO 4
ETH_1_MDC 4
ETH_1_RX_DV 4
ETH_1_RX_ER 4
ETH_1_RXD1 4
PD07
10
PD08
10
PD09
10
ETH_1_RXD0 4
ETH_1_TX_EN 4
ETH_1_TX_CLK 4
ETH_1_TXD0 4
ETH_1_TXD1 4
PD16
10
PD17
10
SD_WP
7
PE01
10
PE02
10
PE03
10
PE04
10
PE05
10
PE06
10
PE07
10
PE08
10
PE09
10
PE10
10
PE11
10
PE12
10
PE13
10
PE14
10
PE15
10
PE16
10
PE17
10
PE18
10
D
TP36 TESTPAD
TP37 TESTPAD
TP38 TESTPAD
C
TP39 TESTPAD
B
TP40
TP41
TP42
TP43
TP44
TP45
TP46
TESTPAD
TESTPAD
TESTPAD
TESTPAD
TESTPAD
TESTPAD
TESTPAD
AP7000
<Core Design>
ATMEL Norway AS
Vestre Rosten 79
N-7075 TILLER
Norway
Title
Size
A3
AP7000_1
Document Number
<Doc>
Date: Tuesday, November 07, 2006 Sheet 1
of 13
A
Rev
PC1