ATF16V8C_99 Datasheet, PDF (1/18 Pages) ATMEL Corporation – Highperformance EE PLD

Features
• Industry-standard Architecture
– Emulates Many 20-pin PALs^®
– Low-cost Easy-to-use Software Tools
• High-speed Electrically-erasable Programmable Logic Devices
– 5 ns Maximum Pin-to-pin Delay
• Low-power - 100 µA Pin-controlled Power-down Mode Option
• CMOS and TTL Compatible Inputs and Outputs
– I/O Pin Keeper Circuits
• Advanced Flash Technology
– Reprogrammable
– 100% Tested
• High-reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Commercial and Industrial Temperature Ranges
• Dual-in-line and Surface Mount Packages in Standard Pinouts
• PCI Compliant
Block Diagram
High-
performance
EE PLD
ATF16V8C
Note: 1. Includes optional PD control pin.
Pin Configurations
TSSOP
All Pinouts Top View
Pin Name Function
CLK
Clock
I
Logic Inputs
I/O
Bidirectional Buffers
OE
Output Enable
I/CLK 1
I1 2
I2 3
PD/I3 4
I4 5
I5 6
I6 7
I7 8
I8 9
GND 10
20 VCC
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 I/O
12 I/O
11 I9/OE
VCC
+5V Supply
PD
Power-down
DIP/SOIC
PLCC
I/CLK 1
I1 2
I2 3
PD/I3 4
I4 5
I5 6
I6 7
I7 8
I8 9
GND 10
20 VCC
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 I/O
12 I/O
11 I9/OE
PD/I3 4
I4 5
I5 6
I6 7
I7 8
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
Rev. 0425G–08/99
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