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ATF1508ASL_14 Datasheet, PDF (1/31 Pages) ATMEL Corporation – High-density, High-performance, Electrically-erasable Complex | |||
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Features
⢠High-density, High-performance, Electrically-erasable Complex
Programmable Logic Device
â 128 Macrocells
â 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
â 84, 100, 160 Pins
â 7.5 ns Maximum Pin-to-pin Delay
â Registered Operation up to 125 MHz
â Enhanced Routing Resources
⢠Flexible Logic Macrocell
â D/T/Latch Configured Flip-flops
â Global and Individual Register Control Signals
â Global and Individual Output Enable
â Programmable Output Slew Rate
â Programmable Output Open Collector Option
â Maximum Logic Utilization by Burying a Register within a COM Output
⢠Advanced Power Management Features
â Automatic 10 µA Standby for âLâ Version
â Pin-controlled 1 mA Standby Mode
â Programmable Pin-keeper Inputs and I/Os
â Reduced-power Feature per Macrocell
⢠Available in Commercial and Industrial Temperature Ranges
⢠Available in 84-lead PLCC, 100-lead PQFP, 100-lead TQFP and 160-lead PQFP Packages
⢠Advanced EE Technology
â 100% Tested
â Completely Reprogrammable
â 10,000 Program/Erase Cycles
â 20-year Data Retention
â 2000V ESD Protection
â 200 mA Latch-up Immunity
⢠JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
⢠Fast In-System Programmability (ISP) via JTAG
⢠PCI-compliant
⢠3.3 or 5.0V I/O Pins
⢠Security Fuse Feature
⢠Green (Pb/Halide-free/RoHS Compliant) Package Options
High-
performance
EE PLD
ATF1508AS
ATF1508ASL
Enhanced Features
⢠Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
⢠Output Enable Product Terms
⢠Transparent-latch Mode
⢠Combinatorial Output with Registered Feedback within Any Macrocell
⢠Three Global Clock Pins
⢠ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
⢠Fast Registered Input from Product Term
⢠Programmable âPin-keeperâ Option
⢠VCC Power-up Reset Option
⢠Pull-up Option on JTAG Pins TMS and TDI
⢠Advanced Power Management Features
â Edge-controlled Power-down âLâ
â Individual Macrocell Power Option
â Disable ITD on Global Clocks, Inputs and I/O for âZâ Parts
Rev. 0784PâPLDâ7/05
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