AT93C66B-SSHM-T Datasheet, PDF (1/21 Pages) ATMEL Corporation – 3-wire Serial EEPROM 2K (256 x 8 or 128 x 16) and 4K (512 x 8 or 256 x 16)

AT93C56B and AT93C66B
3-wire Serial EEPROM
2K (256 x 8 or 128 x 16) and 4K (512 x 8 or 256 x 16)
Features
DATASHEET
 Low-voltage operation
 V_CC = 1.7V to 5.5V
 User-selectable internal organization
 2K: 256 x 8 or 128 x 16
 4K: 512 x 8 or 256 x 16
 3-wire serial interface
 Sequential Read operation
 2MHz clock rate (5V)
 Self-timed write cycle (5ms max)
 High reliability
 Endurance: 1,000,000 write cycles
 Data retention: 100 years
 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, and
8-ball VFBGA packages
Description
The Atmel^® AT93C56B/66B provides 2,048/4,096 bits of Serial Electrically Erasable
Programmable Read-Only Memory (EEPROM) organized as 128/256 words of 16 bits
each (when the ORG pin is connected to V_CC) and 256/512 words of 8 bits each (when
the ORG pin is tied to ground). The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage operations are essential.
The AT93C56B/66B is available in space-saving 8-lead JEDEC SOIC, 8-lead TSSOP,
8-pad UDFN, 8-pad XDFN, and 8-ball VFBGA packages.
The AT93C56B/66B is enabled through the Chip Select pin (CS) and accessed via a
3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a Read instruction at DI, the address is decoded, and the data is
clocked out serially on the DO pin. The write cycle is completely self-timed, and no
separate erase cycle is required before Write. The write cycle is only enabled when
the part is in the Erase/Write Enable state. When CS is brought high following the
initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C56B/66B operates from 1.7V to 5.5V.
Atmel-8735B-SEEPROM-AT93C56B-66B-Datasheet_042013