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AT91SAM9XE128_09 Datasheet, PDF (1/48 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers | |||
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Features
⢠Incorporates the ARM926EJ-S⢠ARM® Thumb® Processor
â DSP instruction Extensions, ARM Jazelle® Technology for Java® Acceleration
â 8 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
â 200 MIPS at 180 MHz
â Memory Management Unit
â EmbeddedICEâ¢, Debug Communication Channel Support
⢠Additional Embedded Memories
â One 32 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed
â One 32 Kbyte (for AT91SAM9XE256 and AT91SAM9XE512) or 16 Kbyte (for
AT91SAM9XE128) Internal SRAM, Single-cycle Access at Maximum Matrix Speed
â 128, 256 or 512 Kbytes of Internal High-speed Flash for AT91SAM9XE128,
AT91SAM9XE256 or AT91SAM9XE512 Respectively. Organized in 256, 512 or 1024
Pages of 512 Bytes Respectively.
⢠128-bit Wide Access
⢠Fast Read Time: 45 ns
⢠Page Programming Time: 4 ms, Including Page Auto-erase,
Full Erase Time: 10 ms
⢠10,000 Write Cycles, 10 Years Data Retention, Page Lock Capabilities, Flash
Security Bit
⢠Enhanced Embedded Flash Controller (EEFC)
â Interface of the Flash Block with the 32-bit Internal Bus
â Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory
Interface
⢠External Bus Interface (EBI)
â Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlashâ¢
⢠USB 2.0 Full Speed (12 Mbits per second) Device Port
â On-chip Transceiver, 2,688-byte Configurable Integrated DPRAM
⢠USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-pin PQFP Device
and Double Port in 217-ball LFBGA Device
â Single or Dual On-chip Transceivers
â Integrated FIFOs and Dedicated DMA Channels
⢠Ethernet MAC 10/100 Base-T
â Media Independent Interface or Reduced Media Independent Interface
â 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
⢠Image Sensor Interface
â ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
â 12-bit Data Interface for Support of High Sensibility Sensors
â SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
⢠Bus Matrix
â Six 32-bit-layer Matrix
â Remap Command
⢠Fully-featured System Controller, including
â Reset Controller, Shutdown Controller
â Four 32-bit Battery Backup Registers for a Total of 16 Bytes
â Clock Generator and Power Management Controller
â Advanced Interrupt Controller and Debug Unit
â Periodic Interval Timer, Watchdog Timer and Real-time Timer
AT91 ARM
Thumb
Microcontrollers
AT91SAM9XE128
AT91SAM9XE256
AT91SAM9XE512
Preliminary
Summary
NOTE: This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
6254BSâATARMâ29-Apr-09
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