AT91RM9200_0509 Datasheet, PDF (1/38 Pages) ATMEL Corporation – ARM920T based Microcontroller

Features
• Incorporates the ARM920T^™ ARM^® Thumb^® Processor
– 200 MIPS at 180 MHz, Memory Management Unit
– 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
– In-circuit Emulator including Debug Communication Channel
– Mid-level Implementation Embedded Trace Macrocell (256-ball BGA Package Only)
• Low Power: On VDDCORE 24.4 mA in Normal Mode, 520 µA in Standby Mode
• Additional Embedded Memories
– 16K Bytes of SRAM and 128K Bytes of ROM
• External Bus Interface (EBI)
– Supports SDRAM, Static Memory, Burst Flash, Glueless Connection to
CompactFlash^® and NAND Flash/SmartMedia^™
• System Peripherals for Enhanced Performance:
– Enhanced Clock Generator and Power Management Controller
– Two On-chip Oscillators with Two PLLs
– Very Slow Clock Operating Mode and Software Power Optimization Capabilities
– Four Programmable External Clock Signals
– System Timer Including Periodic Interrupt, Watchdog and Second Counter
– Real-time Clock with Alarm Interrupt
– Debug Unit, Two-wire UART and Support for Debug Communication Channel
– Advanced Interrupt Controller with 8-level Priority, Individually Maskable Vectored
Interrupt Sources, Spurious Interrupt Protected
– Seven External Interrupt Sources and One Fast Interrupt Source
– Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, Input Change
Interrupt and Open-drain Capability on Each Line
– 20-channel Peripheral DMA Controller (PDC)
• Ethernet MAC 10/100 Base-T
– Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
• USB 2.0 Full Speed (12 Mbits per second) Host Double Port
– Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)
– Integrated FIFOs and Dedicated DMA Channels
• USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
• Multimedia Card Interface (MCI)
– Automatic Protocol Control and Fast Automatic Data Transfers
– MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards
• Three Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Support for ISO7816 T0/T1 Smart Card
– Hardware Handshaking
– RS485 Support, IrDA Up To 115 Kbps
– Full Modem Control Lines on USART1
• Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, 4 External Peripheral Chip Selects
• Two 3-channel, 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• Two-wire Interface (TWI)
– Master Mode Support, All 2-wire Atmel EEPROMs Supported
• IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
• Power Supplies
– 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
– 3.0V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)Available
• in a 208-lead PQFP or 256-ball BGA Package
ARM920T^™-
based
Microcontroller
AT91RM9200
Summary
Rev. 1768IS-ATARM–30-Sep-05