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AT89C51CC03_06 Datasheet, PDF (1/197 Pages) ATMEL Corporation – Enhanced 8-bit MCU with CAN Controller and Flash Memory | |||
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Features
⢠80C51 Core Architecture
⢠256 Bytes of On-chip RAM
⢠2048 Bytes of On-chip ERAM
⢠64K Bytes of On-chip Flash Memory
â Data Retention: 10 Years at 85°C
â Read/Write Cycle: 100K
⢠2K Bytes of On-chip Flash for Bootloader
⢠2K Bytes of On-chip EEPROM
Read/Write Cycle: 100K
⢠Integrated Power Monitor (POR: PFD) To Supervise Internal Power Supply
⢠14-sources 4-level Interrupts
⢠Three 16-bit Timers/Counters
⢠Full Duplex UART Compatible 80C51
⢠High-speed Architecture
â In Standard Mode:
40 MHz (Vcc 3V to 5.5V, both Internal and external code execution)
60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
â In X2 mode (6 Clocks/machine cycle)
20 MHz (Vcc 3V to 5.5V, both Internal and external code execution)
30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
⢠Five Ports: 32 + 4 Digital I/O Lines
⢠Five-channel 16-bit PCA with
â PWM (8-bit)
â High-speed Output
â Timer and Edge Capture
⢠Double Data Pointer
⢠21-bit WatchDog Timer (7 Programmable Bits)
⢠A 10-bit Resolution Analog to Digital Converter (ADC) with 8 Multiplexed Inputs
⢠SPI Interface, (PLCC52, VPFP64 and CABGA 64 packages only)
⢠Full CAN Controller
â Fully Compliant with CAN Rev 2.0A and 2.0B
â Optimized Structure for Communication Management (Via SFR)
â 15 Independent Message Objects
â Each Message Object Programmable on Transmission or Reception
â Individual Tag and Mask Filters up to 29-bit Identifier/Channel
â 8-byte Cyclic Data Register (FIFO)/Message Object
â 16-bit Status and Control Register/Message Object
â 16-bit Time-Stamping Register/Message Object
â CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message
Object
â Access to Message Object Control and Data Registers Via SFR
â Programmable Reception Buffer Length Up To 15 Message Objects
â Priority Management of Reception of Hits on Several Message Objects at the
Same Time (Basic CAN Feature)
â Priority Management for Transmission
â Message Object Overrun Interrupt
â Supports
â Time Triggered Communication
â Autobaud and Listening Mode
â Programmable Automatic Reply Mode
â 1-Mbit/s Maximum Transfer Rate at 8 MHz (1) Crystal Frequency in X2 Mode
â Readable Error Counters
â Programmable Link to On-chip Timer for Time Stamping and Network
Synchronization
â Independent Baud Rate Prescaler
â Data, Remote, Error and Overload Frame Handling
1.
At BRP = 1 sampling point will be fixed.
Enhanced 8-bit
MCU with CAN
Controller and
Flash Memory
AT89C51CC03
Rev. 4182KâCANâ05/06
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