AT89C51AC2_14 Datasheet, PDF (1/9 Pages) ATMEL Corporation – 2 KB of On-chip Flash for Bootloader

Active T89C51AC2, AT89C51AC2 Errata List
• Flash/EEPROM – First Read After Write Disturbed
• Timer 2 – Baud Rate Generator – No IT When TF2 is Set by Software
• Timer 2 – Baud Rate Generator – Long Start Time
• UART – RB8 Lost with JBC on SCON Register
• ADC – Interrupt Controller/ADC Idle Mode/Loops In High Priority Interrupt
• Flash/EEPROM – First Read After Load Disturbed
• C51 Core – Bad Exit of Power-down in X2 Mode
• Timer0/1 – Extra interrupt
• Timer1 - Mode1 Does Not Generate Baud Rate Generator for UART
• EEPROM – Lock-up during ISP write.
A/T89C51AC2 Errata History
Lot Number
Errata List
A00151
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
A00369
1, 3, 4, 5, 6, 7, 8, 9,10, 11, 12, 13,14
A00367, A00368,
A00396 to A00529
1, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13,14
A00510, all lots from A00588
1, 6, 7, 8, 9, 10, 11, 12, 13,14
80C51 MCUs
AT89C51AC2
T89C51AC2
Errata Sheet
A/T89C51AC2 Errata Description
1. Flash/EEPROM – First Read After Write Disturbed
After a write of more than 32 bytes in the EEPROM and 16 bytes in the User Flash
memory, the read of the first byte may be disturbed if it occurs just after the write.
Workaround
Do not load/write more than 32 bytes at a time for EEPROM memory.
Do not load/write more than 16 bytes at a time for User Flash memory,
OR wait 10 ms before reading the first byte.
2. Buffer Noise
Large bounces and high noise are generated when buffers are switching (both ris-
ing and falling edges).
Workaround
None.
3. Double IT on External Falling Edge on INT1 or INT0 in X2 Mode
When the CPU is in X2 mode and Timer1 or Timer 0 in X1 mode (CKCON =
0x7F), IEx flag is not cleared by hardware after servicing interrupt. In this case,
the CPU executes the ISR a second time.
Workaround
The workaround is to clear IEx bit in Interrupt subroutine.
INT1_ISR :
; Interrupt sub routine
CLR IE1
....