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AT84AD004 Datasheet, PDF (1/58 Pages) ATMEL Corporation – DUAL 8 BIT 500 MSPS ADC | |||
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Features
⢠Dual ADC with 8-bit Resolution
⢠500 Msps Sampling Rate per Channel, 1 Gsps in Interlaced Mode
⢠Single or 1:2 Demultiplexed Output
⢠LVDS Output Format (100â¦)
⢠500 mVpp Analog Input (Differential Only)
⢠Differential or Single-ended 50⦠PECL/LVDS Compatible Clock Inputs
⢠Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
⢠LQFP144 Package
⢠Temperature Range:
â 0°C < TA < 70°C (Commercial Grade)
â -40°C < TA < 85°C (Industrial Grade)
⢠3-wire Serial Interface
â 16-bit Data, 3-bit Address
â 1:2 or 1:1 Output Demultiplexer Ratio Selection
â Full or Partial Standby Mode
â Analog Gain (±1.5 dB) Digital Control
â Input Clock Selection
â Analog Input Switch Selection
â Binary or Gray Logical Outputs
â Synchronous Data Ready Reset
â Data Ready Delay Adjustable on Both Channels
â Interlacing Functions:
Offset and Gain (Channel to Channel) Calibration
Digital Fine SDA (Fine Sampling Delay Adjust) on One Channel
â Internal Static or Dynamic Built-In Test (BIT)
Performance
⢠Low Power Consumption: 0.7W per Channel
⢠Power Consumption in Standby Mode: 120 mW
⢠1 GHz Full Power Input Bandwidth (-3 dB)
⢠SNR = 43 dB Typ (7.0 ENOB), THD = -53 dBc, SFDR = -55 dBc at Fs = 500 Msps
Fin = 250 MHz
⢠2-tone IMD3: -54 dBc (249 MHz, 251 MHz) at 500 Msps
⢠DNL = 0.25 LSB, INL = 0.5 LSB
⢠Channel to Channel Input Offset Error: 0.5 LSB Max (After Calibration)
⢠Gain Matching (Channel to Channel): 0.5 LSB Max (After Calibration)
⢠Low Bit Error Rate (10-15) at 500 Msps
Application
⢠Instrumentation
⢠Satellite Receivers
⢠Direct RF Down Conversion
⢠WLAN
Dual 8-bit
500 Msps ADC
AT84AD004
Smart ADC
5390AâBDCâ06/04
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