AT76C712 Datasheet, PDF (1/5 Pages) ATMEL Corporation – High-speed (48 MHz) AVR- based Bridging Device

Features
• Advanced RISC Architecture, 130 Powerful Instructions, Most Single Clock Cycle
Execution
• JTAG (IEEE Std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
• Clock Generator Provides CPU Rates up to 48MHz
• Only One External Clock Crystal of 12 MHz Can Generate All the Required System
Clocks:
– Internal Clock for Standard UART Rates
– A 48 MHz and 96 MHz Clock for USB Data Recovery
– AVR Processor and System Clock
– Full-speed USB Interface (12 Mbits per Second) 2.0 Compliant
• Two On-chip 16550 UARTs Supporting Baud Rates up to 921 Kbaud
– Both UARTs Incorporate individual Transmit and Receive FIFOs of 16 Bytes
– UART0 Supports Modem Control Signals
– Programmable SPI Interface
• On-chip Bootstrap ROM Provides a Variety of Firmware Upgrade Modes
– Device Firmware Upgrade Through USB for the internal Program SRAM (No
External Non-volatile SPI Memory Required)
– Device Firmware Upgrade Through USB for both the Internal Program SRAM and
the External SPI DataFlash^® or EEPROM
– SPI Program Mode from the External DataFlash or EEPROM
• DMA Channels Allow Fast Data Transfers between Endpoint Buffers and Internal or
External SRAM (DMA Transfer Rate is 12 MHz for All Channels)
• 8K x 16 bits (up to 11K x 16 bits), In-System SRAM for Program Code (Program
Memory)
• On-Chip 8 Kbytes SRAM for Data and Variables ( 2, 4, and 8 Kbytes can be Remapped
for Program Storage in the Address Area Above the Program Memory)
• Two 8-bit Timer/Counters
• One 16-bit Timer/Counter
• Two External interrupts Through GPIOs
• Programmable Watchdog Timer
• Low voltage operation:
– 1.8V for the Core
– 1.8V or 3.3V for the Periphery
– 3.3V for the USB
• Low cost 64-pin TQFP Package, Suitable for USB-to-UART Bridge Applications
High-speed
(48 MHz)
AVR^®- based
Bridging Device
AT76C712
Summary
5635AS–USB–12/04