AT45CS1282_14 Datasheet, PDF (1/33 Pages) ATMEL Corporation – Sector Erase Architecture

Features
• Single 2.7V - 3.6V Supply
• Dual-interface Architecture
– RapidS^™ Serial Interface: 50 MHz Maximum Clock Frequency
(SPI Modes 0 and 3 Compatible for Frequencies up to 33 MHz)
– Rapid8^™ 8-bit Interface: 20 MHz Maximum Clock Frequency
• Page Program
– 16,384 Pages (1,056 Bytes/Page) Main Memory
• Sector Erase Architecture
– Sixty-three 270,336-byte Sectors
– One 261,888-byte Sector
– One 8,488-byte Sector
• Two 1056-byte SRAM Data Buffers – Allows Receiving of Data
while Reprogramming the Flash Array
• Continuous Read Capability through Entire Array
– Ideal for Code Shadowing Applications
• Low-power Dissipation
– 10 mA Active Read Current Typical – Serial Interface
– 12 mA Active Read Current Typical – 8-bit Interface
– 15 µA CMOS Standby Current Typical
• Hardware Data Protection
• Security: 128-byte Security Register
– 64-byte User Programmable Space
– Unique 64-byte Device Identifier
• JEDEC Standard Manufacturer and Device ID Read
• 100 Program/Erase Cycles Per Sector Minimum
• Data Retention – 10 Years
• Commercial Temperature Range
Description
The AT45CS1282 is a 2.7-volt, dual-interface sequential access Flash memory
ideally suited for infrequent code shadowing applications. This device utilizes Atmel’s
e^-STAC^™ Multi-Level Cell (MLC) memory technology, which allows a single cell to
Pin Configurations
Pin Name
CS
SCK/CLK
SI
SO
I/O7 - I/O0
WP
RESET
RDY/BUSY
SER/BYTE
Function
Chip Select
Serial Clock/Clock
Serial Input
Serial Output
8-bit Input/Output
Hardware Page Write
Protect Pin
Chip Reset
Ready/Busy
Serial/8-bit Interface
Control
Note:
*Optional Use – See pin description text
for connection information.
TSOP Top View: Type 1
NC 1
NC 2
RDY/BUSY 3
RESET 4
WP 5
NC 6
NC 7
NC 8
VCC 9
GND 10
NC 11
NC 12
NC 13
NC 14
CS 15
SCK 16
SI* 17
SO* 18
NC 19
NC 20
40 NC
39 NC
38 NC
37 NC
36 NC
35 I/O7*
34 I/O6*
33 I/O5*
32 I/O4*
31 VCCP*
30 GNDP*
29 I/O3*
28 I/O2*
27 I/O1*
26 I/O0*
25 SER/BYTE*
24 CLK
23 NC
22 NC
21 NC
CBGA Top View
1 23 45
A
B
C
NC SER/BYTE NC I/O7 I/O6
D
I/O2 SCK/CLK GND VCC I/O5
E
I/O1 CS RDY/BUSY WP I/O4
F
I/O0 SO SI RESET I/O3
G
NC GNDP VCCP NC NC
H
J
128-megabit
2.7-volt
Dual-interface
Code Shadow
DataFlash^®
AT45CS1282
Preliminary
™
Rev. 3447A–DFLSH–2/04
1